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7643 bảng dữ liệu(PDF) 372 Page - Renesas Technology Corp |
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7643 bảng dữ liệu(HTML) 372 Page - Renesas Technology Corp |
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372 / 424 page ![]() 7643 Group REJ09B0133-0200 APPENDIX 3.5 Control registers Rev.2.00 Aug 28, 2006 page 49 of 98 Port P4, P7 direction registers b7 b6 b5 b4 b3 b2 b1 b0 Port P4 direction register, Port P7 direction register (P4D, P7D : addresses 1916, 1B16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 0 : Port P41 or P71 input mode 1 : Port P41 or P71 output mode 0 : Port P40 or P70 input mode 1 : Port P40 or P70 output mode 0 : Port P42 or P72 input mode 1 : Port P42 or P72 output mode Port P4 direction register Port P7 direction register 3 0 : Port P44 or P74 input mode 1 : Port P44 or P74 output mode 0 : Port P43 or P73 input mode 1 : Port P43 or P73 output mode ✕ ✕ ✕ ✕ ✕ 5 6 7 Nothing is arranged for these bits. When these bits are read out, the contents are undefined. Undefined ✕ ✕ ✕ ✕ Undefined Undefined ✕ ✕ Port Pi direction register b7 b6 b5 b4 b3 b2 b1 b0 Port Pi direction register (i = 0, 1, 2, 3, 5, 6, 8) (PiD : addresses 0916, 0B16, 0D16, 0F16, 1716, 1516, 1D16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 0 : Port Pi1 input mode 1 : Port Pi1 output mode 0 : Port Pi0 input mode 1 : Port Pi0 output mode 0 : Port Pi2 input mode 1 : Port Pi2 output mode 5 0 6 7 0 0 Port Pi direction register 3 0 : Port Pi4 input mode 1 : Port Pi4 output mode 0 : Port Pi3 input mode 1 : Port Pi3 output mode 0 : Port Pi5 input mode 1 : Port Pi5 output mode 0 : Port Pi6 input mode 1 : Port Pi6 output mode 0 : Port Pi7 input mode 1 : Port Pi7 output mode ✕ ✕ ✕ ✕ ✕ ✕ ✕ ✕ Fig. 3.5.11 Structure of Port Pi direction register Fig. 3.5.12 Structure of Port P4, Port P7 direction registers |
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