7643 datasheet(86/424 Pages) RENESAS

86 / 424 page

Rev.2.00

Aug 28, 2006

page 69 of 103

REJ09B0133-0200

OVERVIEW

FUNCTIONAL DESCRIPTION

7643 Group

HOLD Function

The HOLD function is used for systems that consist of external cir-

cuits that access MCU buses without use of the CPU (Central

Processing Unit). The HOLD function is used to generate the tim-

ing in which the MCU will relinquish the bus from the CPU to the

external circuits. To use the HOLD function, set the HOLD function

Enable Bit of CPU mode register B (address 000116) to “1”. This

function can be used with both the HOLD pin and the HLDA pin.

The HOLD signal is a signal from an external circuit requesting the

MCU to relinquish use of the bus. When “L” level is input, the MCU

goes to the HOLD state and remains so while the pin is at “L”. The

oscillator does not stop oscillating during the HOLD state, there-

fore allowing the internal peripheral functions to operate during

this time.

When the MCU relinquishes use of the bus, “L” level is output from

the HLDA pin. The MCU makes ports P0 and P1 (address buses)

and port P2 (data bus) tri-state outputs and holds port P37 (RD

pin) and port P36 (WR pin) “H” level. Port P34 (

φ OUT pin) contin-

ues to oscillate. This function is not valid when the MCU is using

the IBF1 function with the HLDA pin.

Expanded Data Memory Access

In Expanded Data Memory Access Mode, the MCU can access a

data area larger than 64 Kbytes with the LDA ($zz), Y (indirect Y)

instruction and the STA ($zz), Y (indirect Y) instruction.

To use this mode, set the Expanded Data Memory Access Bit of

CPU mode register B (address 000116) to “1”. In this case, port

P40 (EDMA pin) goes “L” level during the read/write cycle of the

LDA or STA instruction.

The determination of which bank to access is done by using an I/

O port to represent expanded addresses exceeding address bus

AB15. For example, when accessing 4 banks, use two I/O ports to

represent address buses AB16 and AB17.

Fig. 67 Hold function timing diagram

XIN

RD, WR

ADDROUT

DATAIN/OUT

HOLD

HLDA

φ OUT

tsu(HOLD-

φ)

th(

φ-HOLD)

td(

φ-HLDAL)

td(

φ-HLDAH)

Note: This diagram assumes

φ = XIN/2.

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