| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
M16C/29 bảng dữ liệu(PDF) 242 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M16C/29 bảng dữ liệu(HTML) 242 Page - Renesas Technology Corp |
|
242 / 499 page ![]() 14. Serial I/O p u o r G 9 2 / C 6 1 M page 218 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Figure 14.36 S3C and S4C Registers, S3BRG and S4BRG Registers, and S3TRR and S4TRR Registers b7 b0 Symbol Address After Reset S3BRG 036316 Undefined S4BRG 036716 Undefined 0016 to FF16 b7 b0 Symbol Address After Reset S3TRR 036016 Undefined S4TRR 036416 Undefined SymbolAddressAfter Reset S3C036216 010000002 S4C036616 010000002 b7b6b5b4b3b2b1b0 RW Function SMi5 SMi1 SMi0 SMi3 SMi6 SMi7 Internal synchronous clock select bit Transfer direction select bit S I/Oi port select bit SOUTi initial value set bit 0 0 : Selecting f1 or f2 0 1 : Selecting f8 1 0 : Selecting f32 1 1 : Do not set b1 b0 0 : External clock (2) 1 : Internal clock (3) Effective when the SMi3 is set to 0 0 : “L” output 1 : “H” output 0 : Input/output port 1 : SOUTi output, CLKi function Bit Name Bit Symbol Synchronous clock select bit 0 : LSB first 1 : MSB first SMi2SOUTi output disable bit0 : SOUTi output 1 : SOUTi output disable(high impedance) SMi4CLK polarity selct bit 0 : Transmit data is output at falling edge of transfer clock and receive data is input at rising edge 1 : Transmit data is output at rising edge of transfer clock and receive data is input at falling edge RW RW RW RW RW RW RW RW RW RW RW WO (4) (5) NOTES: 1. Set the S4C register by the next instruction after setting the PRC2 bit in the PRCR register to 1 (write enable). 2. Set the SMi3 bit to 1 and the corresponding port direction bit to 0 (input mode). 3. Set the SMi3 bit to 1 (SOUTi output, CLKi function) . 4. When the SMi2 bit is set to 1, the corresponding pin goes to high-impedance regardless of the function in use. 5. When the SMi1 and SMi0 bit settings are changed, set the SiBRG register . NOTES: 1. Write to this register while serial I/O is neither transmitting or receiving. 2. To receive data, set the corresponding port direction bit for SINi to 0 (input mode). NOTES: 1. Write to this register while serial I/O is neither transmitting or receiving. 2. Use MOV instruction to write to this register. 3. Set the SiBRG register after setting bits SMi1 and SMi0 in the SiC register. Transmission/reception starts by writing transmit data to this register. After transmission/reception completion, reception data can be read by reading this register. Assuming that set value = n, BRGi divides the count source by n + 1 Setting Range Description Description SI/Oi Control Register (i = 3, 4) (1) SI/Oi Bit Rate Generation Register (i = 3, 4) (1, 2, 3) SI/Oi Transmit/Receive Register (i = 3, 4) (1, 2) |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |