M16CSLASH29 datasheet(97/499 Pages) RENESAS

97 / 499 page

9. Interrupts

page 73

Interrupt source

Vector table addresses

Remarks

Reference

Address (L) to address (H)

Undefined instruction FFFDC16 to FFFDF16

Interrupt on UND instruction

M16C/60, M16C/20

Overflow

FFFE016 to FFFE316

Interrupt on INTO instruction

serise software

BRK instruction

FFFE416 to FFFE716

maual

Address match

FFFE816 to FFFEB16

Address match interrupt

Single step (1)

FFFEC16 to FFFEF16

Watchdog timer

FFFF016 to FFFF316

Watchdog timer,

Oscillation stop and

clock generating circuit,

re-oscillation detection,

voltage detection circuit

low voltage detection

________

DBC (1)

FFFF416 to FFFF716

_______

NMI

FFFF816 to FFFFB16

_______

NMI interrupt

Reset(2)

FFFFC16 to FFFFF16

Reset

NOTE:

1. Do not normally use this interrupt because it is provided exclusively for use by development tools.

Figure 9.2 Interrupt Vector

9.2 Interrupts and Interrupt Vector

One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective

interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the

corresponding interrupt vector. Figure 9.2 shows the interrupt vector.

9.2.1 Fixed Vector Tables

The fixed vector tables are allocated to the addresses from FFFDC16 to FFFFF16. Table 9.1 lists the

fixed vector tables. In the flash memory version of MCU, the vector addresses (H) of fixed vectors are

used by the ID code check function. For details, refer to the section "flash memory rewrite disabling

function".

Table 9.1 Fixed Vector Tables

If the contents of address

FFFE716 is FF16, program ex-

ecution starts from the address

shown by the vector in the

relocatable vector table

Mid address

Low address

0 0 0 0

High address

0 0 0 0

Vector address (L)

LSB

MSB

Vector address (H)

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