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R5F121BCAFP bảng dữ liệu(PDF) 44 Page - Renesas Technology Corp

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RL78/G16
2. ELECTRICAL SPECIFICATIONS (TA
= −40 to +85°C)
R01DS0431EJ0130
Rev.1.30
Page 44 of 85
May 19, 2025
2.6
Analog Characteristics
2.6.1
A/D converter characteristics
Targets: ANI0 to ANI10, internal reference voltage, temperature sensor output voltage, and CTSU TSCAP voltage
[TA =
−40 to +85°C, 2.4 V ≤ VDD ≤ 5.5 V, VSS = 0 V]
Item
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Resolution
RES
8
10
bit
Overall errorNote 1, Note 2,
Note 3
AINL
10-bit resolution
VDD = 5 V
±1.7
±3.1
LSB
VDD = 3 V
±2.3
±4.5
LSB
Conversion time
tCONV
10-bit resolution
Targets: ANI0 to ANI10
2.7 V
≤ V
DD
≤ 5.5 V
4.25
17
µs
2.4 V
≤ V
DD
≤ 5.5 V
Note 5
5.75
23
µs
10-bit resolution
Target: Internal reference
voltageNote 6
Target: Temperature sensor
output voltageNote 6
Target: CTSU TSCAP
voltageNote 6
2.4 V
≤ V
DD
≤ 5.5 V
5.75
23
µs
Zero-scale error
Note 1, Note 2, Note 3, Note 4
EZS
10-bit resolution
VDD = 5 V
±0.19
%FSR
VDD = 3 V
±0.39
%FSR
Full-scale error
Note 1, Note 2, Note 3, Note 4
EFS
10-bit resolution
VDD = 5 V
±0.29
%FSR
VDD = 3 V
±0.42
%FSR
Integral linearity error
Note 1, Note 2, Note 3
ILE
10-bit resolution
VDD = 5 V
±1.8
LSB
VDD = 3 V
±1.7
LSB
Differential linearity
errorNote 1, Note 2, Note 3
DLE
10-bit resolution
VDD = 5 V
±1.4
LSB
VDD = 3 V
±1.5
LSB
Analog input voltage
VAIN
Targets: ANI0 to ANI10
0
VDD
V
Target: Internal reference voltageNote 6
VREG
Note 7
V
Target: Temperature sensor output voltageNote 6
VTMPS25
Note 7
V
Target: CTSU TSCAP voltage (2.4 V ≤ V
DD
≤ 5.5 V)
VTSCAP
V
Note 1.
The TYP. value is an average value at TA
= 25°C. The MAX. value is an average value ±3σ at normal
distribution.
Note 2.
These values are the results of characteristic evaluation and are not checked for shipment.
Note 3.
A quantization error (±1/2 LSB) is not included.
Note 4.
Expressed as a ratio (%FSR) relative to the full-scale value.
Note 5.
Be sure to set the LV0 bit in A/D converter mode register 0 (ADM0) to 0 when conversion is done in the
operating voltage range of 2.4 V ≤ VDD < 2.7 V.
Note 6.
Be sure to set the LV0 bit in A/D converter mode register 0 (ADM0) to 0 when the internal reference voltage,
temperature sensor output voltage, or CTSU TSCAP voltage is selected as the target for conversion.
Note 7.
Refer to 2.6.3 Temperature sensor/internal reference voltage characteristics.



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