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TAS2020 bảng dữ liệu(PDF) 67 Page - Texas Instruments |
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TAS2020 bảng dữ liệu(HTML) 67 Page - Texas Instruments |
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67 / 79 page ![]() 7.9 BOOK100 PAGE9 Registers Table 7-98 lists the memory-mapped registers for the BOOK100 PAGE9 registers. All register offset addresses not listed in Table 7-98 should be considered as reserved locations and the register contents should not be modified. Table 7-98. BOOK100 PAGE9 Registers Address Acronym Description Section 0h PAGE Device Page Section 7.9.1 58h DEV_PERF_TUNING_19 Device performance tuning Section 7.9.2 7.9.1 PAGE Register (Address = 0h) [Reset = 00h] Return to the Summary Table. The devices memory map is divided into pages and books. This register sets the page. Table 7-99. PAGE Register Field Descriptions Bit Field Type Reset Description 7-0 PAGE[7:0] R/W 0h Sets the device page. 0h = Page 0 1h = Page 1 FFh = Page 255 7.9.2 DEV_PERF_TUNING_19 Register (Address = 58h) [Reset = 000000h] Return to the Summary Table. Device performance tuning Table 7-100. DEV_PERF_TUNING_19 Register Field Descriptions Bit Field Type Reset Description 23-0 DEV_PERF_TUNING_19[ 23:0] R/W 0h Addresses 0x58 to 0x5A are combined. Can be configured using the PPC3 Software. www.ti.com TAS2020 SLASFD4A – AUGUST 2024 – REVISED JULY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 67 Product Folder Links: TAS2020 |
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