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TAS2020 bảng dữ liệu(PDF) 48 Page - Texas Instruments |
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TAS2020 bảng dữ liệu(HTML) 48 Page - Texas Instruments |
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48 / 79 page ![]() Table 7-34. INT_LATCH_0 Register Field Descriptions (continued) Bit Field Type Reset Description 4 INT_LTCH0[4] R 0h Interrupt due to limiter active flag 0h = No interrupt 1h = Interrupt 3 INT_LTCH0[3] R 0h Interrupt due to brownout detected flag 0h = No interrupt 1h = Interrupt 2 INT_LTCH0[2] R 0h Interrupt due to bop active flag 0h = No interrupt 1h = Interrupt 1 INT_LTCH0[1] R 0h Live Interrupt due to device active flag 0h = No interrupt 1h = Interrupt 0 RESERVED R 0h Reserved 7.1.34 INT_LATCH_1 Register (Address = 61h) [Reset = 00h] Return to the Summary Table. This register provides the status of latched interrupts. Table 7-35. INT_LATCH_1 Register Field Descriptions Bit Field Type Reset Description 7 INT_LTCH1[7] R 0h Interrupt due to PVDD under voltage detection 0h = No interrupt 1h = Interrupt 5 RESERVED R 0h Reserved 4 INT_LTCH1[4] R 0h Interrupt due to Thermal Warning 135C 0h = No interrupt 1h = Interrupt 3 INT_LTCH1[3] R 0h Interrupt due to Thermal Warning 125C 0h = No interrupt 1h = Interrupt 2 INT_LTCH1[2] R 0h Interrupt due to Thermal Warning 115C 0h = No interrupt 1h = Interrupt 1 INT_LTCH1[1] R 0h Interrupt due to Thermal Warning 105C 0h = No interrupt 1h = Interrupt 0 RESERVED R 0h Reserved 7.1.35 INT_LATCH_2 Register (Address = 62h) [Reset = 00h] Return to the Summary Table. This register provides the status of latched interrupts. Table 7-36. INT_LATCH_2 Register Field Descriptions Bit Field Type Reset Description 7 INT_LTCH2[7] R 0h Interrupt due to watchdog expiry 0h = No interrupt 1h = Interrupt 6 RESERVED R 0h Reserved 5 INT_LTCH2[5] R 0h Interrupt due to frame out of sync 0h = No interrupt 1h = Interrupt TAS2020 SLASFD4A – AUGUST 2024 – REVISED JULY 2026 www.ti.com 48 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: TAS2020 |
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