JS48F4400P0P3C0 datasheet(91/139 Pages) NUMONYX

91 / 139 page

April 2008

Datasheet

309823-10

Numonyx™ StrataFlash® Cellular Memory (M18)

Section 6.0, “Flow Charts” on page 41 contains a flow chart of the BEFP operation.

Table 40, “BEFP Requirements and Considerations” on page 91 lists specific BEFP

requirements and considerations.

Note:

For BEFP voltage and temperature operating restrictions, see the datasheet. The block

erase cycles in Table 40, “BEFP Requirements and Considerations” are recommended

for optimal performance. If exceeded some degradation in performance may occur;

however, the internal algorithm will still function correctly.

9.6.3.1

Setup Phase

Issuing the BEFP Setup and Confirm command sequence starts the BEFP algorithm. The

read mode of the addressed partition is automatically changed to Read Status Register

mode.

The address used when issuing the setup/confirm commands must be buffer-size

aligned within the block being programmed -- buffer contents cannot cross block

boundaries.

Caution:

The Read Status Register command must not be issued -- it will be interpreted

as data to be written to the write buffer.

A setup delay (tBEFP/Setup) occurs while the internal algorithm checks VPP and block-lock

status. If errors are detected, the appropriate Status Register error bits are set and the

operation aborts.

The Status Register should be polled for successful BEFP setup, indicated by SR[7,0] =

0 (Device Busy, Buffer Ready for Data).

9.6.3.2

Program/Verify Phase

Data is first written into the write buffer, then programmed into the flash array. During

the buffer-fill sequence, the address used must be buffer-size aligned. Use of any other

address will cause the operation to abort with a program fail error, and any data

previously loaded in the buffer will not be programmed into the array.

The buffer-fill data is stored in sequential buffer locations starting at address 00h. A

word count equal to the maximum buffer size is used, therefore, the buffer must be

completely filled. If the amount of data is less than the maximum buffer size, the

remaining buffer locations must be “padded” with FFFFh to completely fill the buffer.

Flash array programming starts as soon as the write buffer is full. Data words from the

write buffer are programmed into sequential array locations. SR0 = 1 indicates the

write buffer is not available while the BEFP algorithm programs the array.

Table 40: BEFP Requirements and Considerations

BEFP Requirements

Temperature (TCASE) must be 25 °C, ± 5 °C

Voltage on VCC must be within the allowable operating range

Voltage on VPP must be within the allowable operating range

Block being programmed must be erased and unlocked

BEFP Considerations

Block cycling below 100 erase cycles

Reading from another partition during EFP (RWW) is not allowed

BEFP programs within one block at a time

BEFP cannot be suspended

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