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TAS5802PWPR bảng dữ liệu(PDF) 23 Page - Texas Instruments |
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TAS5802PWPR bảng dữ liệu(HTML) 23 Page - Texas Instruments |
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23 / 106 page ![]() Table 6-1. Audio Data Formats, Bit Depths and Clock Rates FORMAT DATA BITS MAXIMUM LRCLK/FS FREQUENCY (kHz) SCLK RATE (fS) I2S/LJ/RJ 32, 24, 20, 16 32 to 96 64, 32 TDM 32, 24, 20, 16 32 128 44.1, 48 128, 256, 512 96 128, 256 Before DSP registers initialize with I2C during the start-up, TAS5802 requires a stable I2S signal. When Clock halt, non-supported SCLK to LRCLK(FS) ratio is detected, the device reports Clock Error in GLOBAL_FAULT1 Register (Offset = 71h) [Reset = 00h] - D[2]. 6.3.4 Serial Audio Port (SAP) The serial audio interface port is a 3-wire serial port with the signals LRCK/FS, SCK, and SDIN. SCK is the serial audio bit clock, used to clock the serial data present on SDIN into the serial shift register of the audio interface. Serial data is clocked into the device on the rising edge of SCK. The LRCK/FS pin is the serial audio left/right word clock or frame sync when the device is operated in TDM Mode. The device supports industry-standard audio data formats, including standard I2S, left-justified, right-justified, and TDM/DSP data. Data formats are selected via Register (SAP_CTRL1 Register (Offset = 33h) [Reset = 02h] - D[5:4]). If the high width of LRCK/FS in TDM/DSP mode is less than 8 cycles of SCK, the register (SAP_CTRL1 Register (Offset = 33h) [Reset = 02h] - D[3:2]) should be set to 01. All formats require binary two's complement, MSB-first audio data; up to 32-bit audio data is accepted. All the data formats, word length, and clock rate supported by this device are shown in Table 1. The data formats are detailed in Figure 1 through Figure 6. The word length are selected via Register (SAP_CTRL1 Register (Offset = 33h) [Reset = 02h] - D[1:0]). The offsets of data are selected via Register ( SAP_CTRL1 Register (Offset = 33h) [Reset = 02h] - D[7]) and Register (SAP_CTRL2 Register (Offset = 34h) [Reset = 00h] - D[7:0]). The default setting is I2S and 24-bit word length. Table 6-2. Audio Data Formats, Word Lengths, and Clock Rates FORMAT DATA BITS LRCK/FS FREQUENCY (kHz) SCK RATE (fs) I2S/LJ/RJ 32, 24, 20, 16 16, 32, 44.1/48, 96 32,64 TDM/DSP 32, 24, 20, 16 16, 32, 44.1/48, 96 128, 256, 512 1 2 16 15 MSB LSB Left channel LRCK/FS SCK SDIN 1 2 24 23 MSB LSB 1 2 32 31 MSB LSB 1 2 16 15 MSB LSB 1 2 24 23 MSB LSB 1 2 32 31 MSB LSB SDIN SDIN Right channel Audio data word = 16-bit, SCK=32, 64fs Audio data word = 24-bit, SCK=64fs Audio data word = 32-bit, SCK=64fs Figure 6-2. Left Justified Audio Data Format www.ti.com TAS5802 SLASFB7A – NOVEMBER 2024 – REVISED AUGUST 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TAS5802 |
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