D950-CORE datasheet(39/89 Pages) STMICROELECTRONICS

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D950-Core

Table 4.5

Direct Address Register Table

Note:

Memory mapping is described in the appendix (see

Section 8)

Function

Location

AX0

X address register

ACU

AX1

X address register

ACU

AY0

Y address register

ACU

AY1

Y address register

ACU

IX0

X index register

ACU

IX1

X index register

ACU

IX2

X index register

ACU

IX3

X index register

ACU

IY0

Y index register

ACU

IY1

Y index register

ACU

IY2

Y index register

ACU

IY3

Y index register

ACU

SPX

Stack Pointer register

ACU

Loop Start register

PCU

Loop Count register

PCU

Loop End register

PCU

DCU input left register (LSB)

DCU

DCU input left register (MSB)

DCU

DCU input right register (LSB)

DCU

DCU input right register (MSB)

DCU

Product register (LSB)

DCU

Product register (MSB)

DCU

CCR

Condition Code Register

DCU

STA

Status register

DCU

A0L

Accumulator 0 (LSB)

DCU

A0H

Accumulator 0 (MSB)

DCU

A0E

Accumulator 0 (Extension)

DCU

BSC

Barrel Shifter Control register

DCU

A1L

Accumulator 1 (LSB)

DCU

A1H

Accumulator 1 (MSB)

DCU

A1E

Accumulator 1 (Extension)

DCU

PSC

Product Shift Control register

DCU

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