D950-CORE datasheet(32/89 Pages) STMICROELECTRONICS

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D950-Core

4.4

General Purpose P-Port

4.4.1 Introduction

The P-Port is an 8-bit (P0/P7) general purpose parallel port in which each port pin can be

individually programmed as input (level or falling edge sensitive) or output.1

The data direction and sensitivity for each bit are programmed through PCDR and PCSR 8-bit

registers.

Port inputs are sampled on each INCYCLE rising edge. Detection of a level change is

performed, provided the input remains at the same level for at least one INCYCLE cycle.2

The Port input data is stored into the 8-bit Port Input Register (PIR). The Port output data is

stored into the 8-bit Port Output Register (POR).3

Figure 4.13

D950-Core Parallel I/O Port

Notes

PPort can be used as a branch condition.

PIR value is set to 1 on falling edge detection,until the port is tested.

The significant bit are 8-LSBs (8-MSBs=undefined when reading).

PORT INPUT

REG. (PIR)

EDGE/LEVEL

SENSITIVITY

FALLING EDGE

DETECTION

LEVEL

DETECTION

PORT OUTPUT

REG. (POR)

PORT CONTROL

DIRECTION REG.

(PCDR)

PORT CONTROL

SENSITIVITY

REG. (PCSR)

P0 / P7

PORT CONDITION

TO P.C.U.

VR02017N

P_EN

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