D950-CORE datasheet(70/89 Pages) STMICROELECTRONICS

tên linh kiện	D950-CORE

Giải thích chi tiết về linh kiện	16-Bit Fixed Point Digital Signal Processor DSP Core

PDF	89 Pages

Scroll/Zoom	100%

nhà sản xuất	STMICROELECTRONICS [STMicroelectronics]

Trang chủ	http://www.st.com

Logo

70 / 89 page

70/89

D950-Core

7.2.4 BSU control registers

The BSU is software controlled by six control registers mapped in the Y-memory space. These

define the type of memory used, internal to external boundary address crossing and software

wait-states count.

There are 2 registers per memory space, making it possible to define 2 sets of boundries and

wait state numbers.

Figure 7.2

Default and User Mapping Examples

The BSU control registers include a reference address on bits 4 to 9, where the internal/

external memory boundary value is stored (see Figure 7.2), and software wait-states count on

bits 0 to 3, allowing up to 16 wait-states.

External addressing is recognized by comparing these address bits for each valid address

from IA, XA and YA, to the reference address contained into the corresponding control

If the address is greater or equal to the reference value, an external access proceeds.

For the following examples, ‘-’ means RESERVED (read: 0, write: don't care)

EXTERNAL

INTERNAL1

64K

63K

62K

INTERNAL0

DEFAULT MAPPING (RESET)

USER MAPPING

(CAN CHANGE BY 1K STEP)

VALUE 1

VALUE 0

VALUE 1

VALUE 0

EXTERNAL

INTERNAL1

INTERNAL0

64K

D950-CORE bảng dữ liệu(PDF) 70 Page - STMicroelectronics