TMP86PM74AFG datasheet(12/190 Pages) TOSHIBA

12 / 190 page

Page 2

1.1 Features

TMP86PM74AFG

8. 8-bit timer counter : 1 ch

- Timer, Event counter, Capture modes

9. 8-bit timer counter : 1 ch

- Timer, Event counter, Pulse width modulation (PWM) output,

Programmable divider output (PDO) modes

10. Serial Interface

- 8-bit SIO :1 channel (32 bytes Buffer)

11. 8-bit successive approximation type AD converter (with sample hold)

Analog inputs: 8ch

12. Key-on wakeup : 4 ch

13. Vacuum flouorescent tube driver (automatic display)

- Programmable grid scan

- High breakdown voltage ports(MAX 40 V × 37 bits)

14. Clock operation

Single clock mode

Dual clock mode

15. Low power consumption operation

STOP mode: Oscillation stops. (Battery/Capacitor back-up.)

SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock

stop.)

SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock

oscillate.)

IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high fre-

quency clock. Release by falling edge of the source clock which is set by TBTCR<TBTCK>.

IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru-

puts(CPU restarts).

IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter-

ruputs. (CPU restarts).

SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low fre-

quency clock.Release by falling edge of the source clock which is set by TBTCR<TBTCK>.

SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru-

put.(CPU restarts).

SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock.

Release by

interruput.

16. Wide operation voltage:

4.5 V to 5.5 V at 16MHz /32.768 kHz

2.7 V to 5.5 V at 8 MHz /32.768 kHz

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