TMP86PM74AFG datasheet(63/190 Pages) TOSHIBA

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Page 53

TMP86PM74AFG

5. I/O Ports

The TMP86PM74AFG has 11 parallel input/output ports (70 pins) as follows.

Each output port contains a latch, which holds the output data. All input ports do not have latches, so the external

input data should be externally held until the input data is read from outside or reading should be performed several

timer before processing. Figure 5-1 shows input/output timing examples. External data is read from an I/O port in the

S1 state of the read cycle during execution of the read instruction. This timing cannot be recognized from outside, so

that transient input such as chattering must be processed by the program.

Output data changes in the S2 state of the write cycle during execution of the instruction which writes to an I/O

port.

Note: The positions of the read and write cycles may vary, depending on the instruction.

Figure 5-1 Input/Output Timing (Example)

Primary Function

Secondary Functions

Port P0

8-bit I/O port

–

Port P1

8-bit I/O port

External interrupt input, timer/counter input/output,

Serial interface input/output

Port P2

3-bit I/O port

Low-frequency resonator connections, external interrupt input/output,

STOP mode release signal Input

Port P3

2-bit I/O port

–

Port P4

8-bit I/O port

Analog input, STOP mode release signal input

Port P5

4-bit I/O port

External interrupt input

Port P6

8-bit I/O port

VFT output

Port P7

8-bit I/O port

VFT output

Port P8

8-bit I/O port

VFT output

Port P9

8-bit I/O port

VFT output

Port PD

5-bit I/O port

VFT output

Instruction

execution cycle

Input strobe

Data input

Ex: LD A, (x)

Fetch cycle

Read cycle

S0S1S2S3S0S1S2S3S0S1S2S3

Instruction

execution cycle

Output latch pulse

Data output

Ex: LD (x), A

Fetch cycle

Write cycle

S0S1S2S3S0S1S2S3S0S1S2S3

(a) Input timing

(b) Output timing

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