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TMP86PM74AFG bảng dữ liệu(PDF) 67 Page - Toshiba Semiconductor |
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TMP86PM74AFG bảng dữ liệu(HTML) 67 Page - Toshiba Semiconductor |
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67 / 190 page ![]() Page 57 TMP86PM74AFG 5.3 Port P2 (P22 to P20) Port P2 is a 3-bit input/output port. It can work not only as a port but also as external input, STOP mode release signal input, and low-frequency resonator connection pins. To use it as an input port or the secondary-function pins, set the output latch (P2DR) to “1”. A reset initializes the P2DR to “1”. To run the device in dual clock mode, connect a low-frequency resonator (32.768 kHz) to pins P21 (XTIN) and P22 (XTOUT). When the device runs in single clock mode, P21 and P22 can be used as an ordinary input/output port. It is recommended that pin P20 be used for external interrupt input, STOP release signal input, or as an input port (if it is used as an output port, it is set with the content of the interrupt latch at the negative-going edge of the signal.) Port P2 has separate data input registers. To sense the state of the output latch, read the P2DR. To sense the state of the pins of the port, read the P2 port input data (P2PRD) register. If a read instruction is executed for the P2DR or P2PRD on port P2, the sensed state of bits 7 to 3 is undefined. Figure 5-4 Port P2 Note: Because pin P20 is used also as the STOP pin, its output high impedance becomes high when it enters the STOP mode regardless of the state of OUTEN. P2DR (0002H) R/W 76 543 21 0 P22 XTOUT P21 XTIN P20 INT5 STOP (Initial value: **** *111) P2PRD (0016H) Read only 76 543 21 0 P22 P21 P20 Output latch Output latch Output latch Data input (P21) Data output (P21) Data output (P20) Data input (P20) Data input (P20PRD), Data input (P22PRD) Control input Data input (P21PRD) Data output (P22) Data input (P22) STOP OUTEN XTEN fs P22 (XTOUT) P21 (XTIN) P20 (INT5, STOP) Osc. enable D Q D Q D Q |
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