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TMP93CS32F bảng dữ liệu(PDF) 122 Page - Toshiba Semiconductor

tên linh kiện TMP93CS32F
Giải thích chi tiết về linh kiện  CMOS 16-Bit Microcontroller
PDF  180 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMP93CS32F bảng dữ liệu(HTML) 122 Page - Toshiba Semiconductor

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TMP93CS32
2004-02-10
93CS32-120
Table 3.9.2 Selection of UART Transfer Rate (1) (when baud rate generator is used)
Unit (kbps)
fc [MHz]
Input clock
Frequency divisor
φT0
(4/fc)
φT2
(16/fc)
φT8
(64/fc)
φT32
(256/fc)
9.830400
1
153.600
38.400
9.600
2.400
↑
2
76.800
19.200
4.800
1.200
↑
4
38.400
9.600
2.400
0.600
↑
8
19.200
4.800
1.200
0.300
↑
16
9.600
2.400
0.600
0.150
12.288000
5
38.400
9.600
2.400
0.600
↑
10
19.200
4.800
1.200
0.300
14.745600
1
230.400
57.600
14.400
3.600
↑
3
76.800
19.200
4.800
1.200
↑
6
38.400
9.600
2.400
0.600
↑
12
19.200
4.800
1.200
0.300
17.2032
7
38.400
9.600
2.400
0.600
↑
14
19.200
4.800
1.200
0.300
19.6608
2
153.600
38.400
9.600
2.400
↑
4
76.800
19.200
4.800
1.200
↑
8
38.400
9.600
2.400
0.600
↑
16
19.200
4.800
1.200
0.300
Note 1: Transfer rate in I/O interface mode is 8 times faster than the values given in the above table.
Note 2: This table is calculated when fc/1 is selected as a clock gear, and the system clock as a
prescaler clock.
Table 3.9.3 Selection of UART Transfer Rate (2)
(when timer 2 (input clock φT1) is used)
Unit (kbps)
fc
TREG2
19.6608
MHz
14.7456
MHz
12.288
MHz
12
MHz
9.8304
MHz
8
MHz
6.144
MHz
1H
153.6
115.2
96
76.8
62.5
48
2H
76.8
57.6
48
38.4
31.25
24
3H
51.2
38.4
32
31.25
16
4H
38.4
28.8
24
19.2
12
5H
30.72
23.04
19.2
9.6
8H
19.2
14.4
12
9.6
6
AH
15.36
11.52
9.6
4.8
10H
9.60
7.20
6
4.8
3
14H
7.68
5.76
4.8
2.4
How to calculate the transfer rate (when timer 2 is used):
The clock frequency selected by the register SYSCR0<PRCK1:0>
Transfer rate
=
TREG2
× 8 × 16
Note 1: Timer 2 match detect signal cannot be used as the transfer clock in I/O interface mode.
Note 2: This table is calculated when fc/1 is selected as a clock gear, and fFPH as a prescaler clock.
(When Timer 2 (input clock
φT1) is used.)



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