TMP93CS32F datasheet(100/180 Pages) TOSHIBA

100 / 180 page

TMP93CS32

2004-02-10

93CS32-98

(5) Capture input control

This circuit controls the timing to latch the value of up counter UC4 into (CAP1 and

CAP2). The latch timing of capture register is controlled by register T4MOD<CAP12M

1:0>.

•

When T4MOD<CAP12M1:0>

= “00”

Capture function is disabled. Disable is the default on reset.

•

When T4MOD<CAP12M1:0>

= “01”

Data is loaded to CAP1 at the rise edge of TI4 pin (also used as P42/INT4) input,

while data is loaded to CAP2 at the rise edge of TI5 pin (also used as P43/INT5) input.

•

When T4MOD<CAP12M1:0>

= “10”

Data is loaded to CAP1 at the rise edge of TI4 pin input, while to CAP2 at the fall

edge. Only in this setting, interrupt INT4 occurs at fall edge.

•

When T4MOD<CAP12M1:0>

= “11”

Data is loaded to CAP1 at the rise edge of timer flip-flop TFF1, while to CAP2 at the

fall edge.

Besides, the value of up counter can be loaded to capture registers by software. Whenever

“0” is written in T4MOD<CAP1IN> the current value of up counter will be loaded to

capture register CAP1. It is necessary to keep the prescaler in RUN mode

(TRUN<PRRUN> to be “1”).

(6) Comparator

These are 16-bit comparators which compare the up counter UC4 value with the set

value of (TREG4, TREG5) to detect the match. When a match is detected, the comparators

generate an interrupt (INTTR4, INTTR5) respectively. The up counter UC4 is cleared only

when UC4 matches TREG5 (The clearing of up counter UC4 can be disabled by setting

T4MOD<CLE>

= 0).

(7) Timer flip-flop (TFF4)

This flip-flop is inverted by the match detect signal from the comparators and the latch

signals to the capture registers. Disable/enable of inversion can be set for each element by

T4FFCR<CAP2T4, CAP1T4, EQ5T4, EQ4T4>. After reset, the value of TFF4 is undefined.

TFF4 will be inverted when “00” is written in T4FFCR<TFF4C1:0>. Also it is set to “1”

when “01” is written, and set to “0” when “10” is written. The value of TFF4 can be output to

the timer output pin TO4 (also used as P44). Timer output should be specified by the

function register of Port 4. (See Register for Port 4 in Figure 3.5.10.)

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