PM7375-SC datasheet(76/430 Pages) PMC

76 / 430 page

PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

DMA requests are always serviced before transmit DMA requests. Selection can be

made by the user.

In the transmit direction, an eight cell queue is provided to allow prefetching of

transmit cells to account for PCI bus latency. In the receive direction, a 96 cell

queue is provided to allow for a 270 µs PCI bus latency.

9.14.1 PCI Interface and Mailbox

The LASAR-155 provides a PCI Local Bus Specifications Version 2.1 (PCID)

interface. When operating as the target, the PCI Interface provides access to the

LASAR-155 registers to configure the LASAR-155, monitor the LASAR-155 and to

control the DMA queues. Register access is described in the microprocessor and

PCI Host Register Memory Map Section below.

A mailbox scheme is provided to allow the PCI Host to communicate with an

external microprocessor. Two 64 word buffers with associated semaphores are

provided. One buffer is used for PCI Host to microprocessor communication while

the other buffer is used for microprocessor to PCI Host communication. The data

transfer format is implementation specific.

When the local microprocessor is present in the system, as indicated when the

MPENB pin is sampled low, the PCI Host can only access dedicated registers. The

base of the LASAR-155's internal address space is set via the LASAR-155 Memory

Base Address register in the PCI Configuration memory space. The maximum size

of the memory space is 4K Bytes. If the PCI Host wishes to access any registers

controlled by the local microprocessor it must do so via the mailbox.

When the local microprocessor is not present, the PCI Host has direct access to all

registers in the LASAR-155. In addition the PCI Host can access an Expansion

EPROM and external devices via the LASAR-155 Local Bus. The base of the

LASAR-155's internal address space is set via the LASAR-155 Memory Base

Address register in the PCI Configuration memory space. The maximum size of the

memory space is 4K Bytes. The Expansion EPROM space is set by the Expansion

ROM Base Address Register in the PCI Configuration memory space. The

maximum size of the memory space is 64K Bytes. The External device space is 16K

Bytes maximum and is located using the External Device Memory Base Address

map is shown below.

Note, both the LASAR-155 Memory and External Device Memory is DWORD and

Word accessible only.

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