PM7375-SC datasheet(46/430 Pages) PMC

46 / 430 page

PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

SERRB

Output

The active low system error (SERRB) signal indicates

when the LASAR-155 detects an address parity error

or when configured as an initiator, it generates a

master abort or receives a target abort. Address parity

errors are indicated when the even parity calculation

during an address phase does not match the PAR

input. When the LASAR-155 detects a system error,

SERRB is forced low for one PCICLK period.

SERRB is enabled using a bit in the Control register in

the PCI Configuration registers space. In addition,

regardless of whether output, SERRB is enabled or

not, system errors are indicated in the Status register

in the PCI Configuration registers space.

SERRB is asserted on the rising edge of PCICLK.

SERRB is an open drain output and relies on an

external pull up resister to return to the logic one state.

PCIINTB

Output

195

The active low PCI interrupt (PCIINTB) signal goes

low when a LASAR-155 interrupt source is active, and

that source is unmasked. The LASAR-155 may be

enabled to report many alarms or events via

interrupts. Examples are loss of signal (LOS), loss of

frame (LOF), line AIS, line far end receive failure

(FERF), loss of pointer (LOP), path AIS, path RDI, and

many others. PCIINTB returns high when the interrupt

is acknowledged via an appropriate register access.

PCIINTB is an open drain output.

When the PCIINTB signal asserts, the PCID Interrupt

Status and the PCID Mailbox/Microprocessor Interrupt

Status/Enable registers should be read to determine

the source of the interrupt.

PCIINTB is updated on the rising edge of PCICLK.

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