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PM7375-SC bảng dữ liệu(PDF) 48 Page - PMC-Sierra, Inc

tên linh kiện PM7375-SC
Giải thích chi tiết về linh kiện  LOCAL ATM SAR & PHYSICAL LAYER
PDF  430 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7375-SC bảng dữ liệu(HTML) 48 Page - PMC-Sierra, Inc

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PM7375 LASAR-155
DATA SHEET
PMC-931127
ISSUE 6
LOCAL ATM SAR & PHYSICAL LAYER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
32
RDB
I/O
162
For slave mode operation the active low read enable
(RDB) signal is configured as an input. RDB is low
during LASAR-155 Microprocessor Interface Port
register read accesses. The LASAR-155 drives the
D[15:0] bus with the contents of the addressed register
while RDB and CSB are low.
For master mode operation the active low read enable
(RDB) signal is configured as an output. RDB is low
during LASAR-155 Local Bus read accesses. The
device being read should drive the D[7:0] bus with the
contents of the addressed memory location while RDB
and either CS1B or CS2B is low. For this mode of
operation RDB is generated on the rising edge of
PCICLK.
WRB
I/O
163
For slave mode operation the active low write strobe
(WRB) signal is configured as an input. WRB is low
during a LASAR-155 Microprocessor Interface Port
register write accesses. The D[15:0] bus contents are
clocked into the addressed register on the rising WRB
edge while CSB is low.
For master mode operation the active low write strobe
(WRB) signal is configured as an output. WRB is low
during a LASAR-155 Local Bus write accesses. D[7:0]
bus contents are clocked into the addressed memory
location of the device being written to on the rising
WRB edge while either CS1B or CS2B is low. For this
mode of operation WRB is generated on the rising
edge of PCICLK.



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