PXAS30 datasheet(20/52 Pages) PHILIPS

20 / 52 page

Philips Semiconductors

Preliminary specification

XA-S3

XA 16-bit microcontroller

32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),

I2C, 2 UARTs, 16 MB address range

2000 Dec 01

XA-S3 Timer/Counters

The XA-S3 has three general purpose counter/timers, two of which may

also be used as baud rate generators for either or both of the UARTs.

Timer 0 and 1

These are identical to the standard XA-G3 timer 0 and 1.

Timer 2

This is identical to the standard XA-G3 timer 2.

Programmable Counter Array (PCA)

The Programmable Counter Array available on the XA-S3 is a

special 16-bit Timer that has five 16-bit capture/compare modules

associated with it. Each of the modules can be programmed to

operate in one of four modes: rising and/or falling edge capture,

software timer, high-speed output, or pulse width modulator. Each

module has a pin associated with it in port 1. Module 0 is connected

to P4.1(CEX0), module 1 to P4.2(CEX1), etc. The basic PCA

configuration is shown in Figure 7.

The PCA timer is a common time base for all five modules and can

be programmed to run at: the TCLK rate (Osc/4, Osc/16, or Osc/64),

the Timer 0 overflow, or the input on the ECI pin (P4.0). When the

ECI input is used, the falling edge clocks the PCA counter. The timer

count source is determined from the CPS1 and CPS0 bits in the

CMOD SFR as follows (see Figure 10):

CPS1 CPS0 PCA Timer Count Source

TCLK (Osc/4, Osc/16, or Osc/64)

Timer 0 overflow

ECI (PCA External Clock Input (max rate = Osc/4)

In the CMOD SFR are three additional bits associated with the PCA.

They are CIDL which allows the PCA to stop during idle mode,

WDTE which enables or disables the watchdog function on

module 4, and ECF which when set causes an interrupt and the

PCA overflow flag CF (in the CCON SFR) to be set when the PCA

timer overflows. These functions are shown in Figure 8. In addition,

each PCA module may generate a separate interrupt.

The watchdog timer function is implemented in module 4 (see

Figure 17).

The CCON SFR contains the run control bit for the PCA and the

flags for the PCA timer (CF) and each module (refer to Figure 11).

To run the PCA the CR bit (CCON.6) must be set by software. The

PCA is shut off by clearing this bit. The CF bit (CCON.7) is set when

the PCA counter overflows and an interrupt will be generated if the

ECF bit in the CMOD register is set, The CF bit can only be cleared

by software. Bits 0 through 4 of the CCON register are the flags for

the modules (bit 0 for module 0, bit 1 for module 1, etc.) and are set

by hardware when either a match or a capture occurs. These flags

also can only be cleared by software. The PCA interrupt system

shown in Figure 9.

Each module in the PCA has a special function register associated

with it. These registers are: CCAPM0 for module 0, CCAPM1 for

module 1, etc. (see Figure 12). The registers contain the bits that

control the mode that each module will operate in. The ECCF bit

(CCAPMn.0 where n=0, 1, 2, 3, or 4 depending on the module)

enables the CCF flag in the CCON SFR to generate an interrupt

when a match or compare occurs in the associated module. PWM

(CCAPMn.1) enables the pulse width modulation mode. The TOG

bit (CCAPMn.2) when set causes the CEX output associated with

the module to toggle when there is a match between the PCA

counter and the module’s capture/compare register. The match bit

MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON

and the module’s capture/compare register.

The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5)

determine the edge that a capture input will be active on. The CAPN

bit enables the negative edge, and the CAPP bit enables the

positive edge. If both bits are set both edges will be enabled and a

capture will occur for either transition. The last bit in the register

ECOM (CCAPMn.6) when set enables the comparator function.

Figure 13 shows the CCAPMn settings for the various PCA

functions.

There are two additional registers associated with each of the PCA

modules. They are CCAPnH and CCAPnL and these are the

registers that store the 16-bit count when a capture occurs or a

compare should occur. When a module is used in the PWM mode

these registers are used to control the duty cycle of the output.

MODULE FUNCTIONS:

16-BIT CAPTURE

16-BIT TIMER

16-BIT HIGH SPEED OUTPUT

8-BIT PWM

WATCHDOG TIMER (MODULE 4 ONLY)

MODULE 0

MODULE 1

MODULE 2

MODULE 3

MODULE 4

P4.1/CEX0

P4.2/CEX1

P4.3/CEX2

P4.4/CEX3

P4.5/CEX4

16 BITS

PCA TIMER/COUNTER

TIME BASE FOR PCA MODULES

16 BITS

SU01303

Figure 7. Programmable Counter Array (PCA)

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