AMD-K6-2ESLASH233AMZ datasheet(248/332 Pages) AMD

248 / 332 page

230

Test and Debug

Chapter 12

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

TAP Signals

The test signals associated with the TAP controller are as

follows:

TCK—The Test Clock for all TAP operations. The rising

edge of TCK is used for sampling TAP signals, and the

falling edge of TCK is used for asserting TAP signals. The

state of the TMS signal sampled on the rising edge of TCK

causes the state transitions of the TAP controller to occur.

TCK can be stopped in the logic 0 or 1 state.

TDI—The Test Data Input represents the input to the most

significant bit of all TAP registers, including the IR and all

test data registers. Test data and instructions are serially

shifted by one bit into their respective registers on the rising

edge of TCK.

TDO—The Test Data Output represents the output of the

least significant bit of all TAP registers, including the IR and

all test data registers. Test data and instructions are serially

shifted by one bit out of their respective registers on the

falling edge of TCK.

TMS—The Test Mode Select input specifies the test

function and sequence of state changes for boundary-scan

testing. If TMS is sampled High for five or more consecutive

clocks, the TAP controller enters its reset state.

TRST#—The Test Reset signal is an asynchronous reset that

unconditionally causes the TAP controller to enter its reset

state.

Refer to “Electrical Data” on page 253 and “Signal Switching

Charac t e rist ic s” on pa ge 26 7 t o obta in t he ele ct r ic al

specifications of the test signals.

AMD-K6-2E/233AMZ bảng dữ liệu(PDF) 248 Page - Advanced Micro Devices