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ADC3683 bảng dữ liệu(PDF) 10 Page - Texas Instruments |
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ADC3683 bảng dữ liệu(HTML) 10 Page - Texas Instruments |
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10 / 70 page ![]() 5.8 Timing Requirements Typical values are at TA = 25°C, MIN and MAX timing values are characterized over the full temperature range TMIN = –55°C to TMAX = 105°C and are NOT production tested, ADC sampling rate = 65 MSPS, 50% clock duty cycle, AVDD = IOVDD = 1.8 V, 1.6 V external reference, and –1-dBFS differential input, unless otherwise noted PARAMETER TEST CONDITIONS MIN NOM MAX UNIT ADC Timing Specifications tAD Aperture Delay 0.85 ns tA Aperture Jitter Square wave clock with fast edges 180 fs tJ Jitter on DCLKIN ± 50 (1) ps tACQ Signal acquisition period, referenced to sampling clock falling edge FS = 10 Msps -TS/2 Sampling Clock Period FS = 25 Msps -TS/2 FS = 65 Msps -TS/4 tCONV Signal conversion period, referenced to sampling clock falling edge FS = 10 Msps +TS × 1/5 Sampling Clock Period FS = 25 Msps +TS × 3/8 FS = 65 Msps +TS × 5/8 Wake up time Time to valid data after coming out of power down. Internal reference. Bandgap reference enabled, single ended clock us Bandgap reference enabled, differential clock Bandgap reference disabled, single ended clock ms Bandgap reference disabled, differential clock Time to valid data after coming out of power down. External 1.6V reference. Bandgap reference enabled, single ended clock us Bandgap reference enabled, differential clock 100 Bandgap reference disabled, single ended clock ms Bandgap reference disabled, differential clock tS,SYNC Setup time for SYNC input signal Referenced to sampling clock rising edge 500 ps tH,SYNC Hold time for SYNC input signal 600 ADC Latency Signal input to data output SLVDS 2-wire 2 ADC clock cycles SLVDS 1-wire 1 SLVDS 1/2-wire 1 Add Latency Real decimation by 2 21 Output clock cycles Complex decimation by 2 22 Real or complex decimation by 4, 8, 16, 32 23 ADC3683-SP SBASAB5 – MARCH 2024 www.ti.com 10 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: ADC3683-SP |
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