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ADC3683 bảng dữ liệu(PDF) 48 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  ADC3683-SP Space Grade 18-Bit 1 to 65MSPS, Low Noise, Ultra-low Power Dual Channel ADC
PDF  70 Pages
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8.4 Power Supply Recommendations
The ADC3683-SP requires two different power-supplies. The AVDD rail provides power for the internal analog
circuits and to the ADC while the IOVDD rail powers the digital interface, the internal digital circuits like
decimation filter, or the output interface mapper. Power sequencing is not required.
The AVDD power supply must be low noise to achieve data sheet performance. In applications operating near
DC, the 1/f noise contribution of the power supply needs to be considered. The ADC is designed for good PSRR
which aides with the power supply filter design.
Frequency of Signal on AVDD (MHz)
0.05
0.1
1
10
100
30
35
40
45
50
55
D42_
Figure 8-7. Power Supply Rejection Ratio (PSRR) vs Frequency
There are two recommended power-supply architectures:
1. Step down using high-efficiency switching converters, followed by a second stage of regulation using a low
noise LDO to provide switching noise reduction and improved voltage accuracy.
2. Directly step down the final ADC supply voltage using high-efficiency switching converters. This approach
provides the best efficiency, but care must be taken to make sure switching noise is minimized to prevent
degraded ADC performance.
TI WEBENCH® Power Designer can be used to select and design the individual power-supply elements needed:
see the WEBENCH® Power Designer
Recommended switching regulators for the first stage include the TPS62821, and similar devices.
Recommended low dropout (LDO) linear regulators include the TPS7A4701, TPS7A90, LP5901, and similar
devices.
For the switch regulator only approach, the ripple filter must be designed with a notch frequency that aligns with
the switching ripple frequency of the DC/DC converter. Note the switching frequency reported from WEBENCH®
and design the EMI filter and capacitor combination to have the notch frequency centered as needed. Figure 8-8
and Figure 8-9 illustrate the two approaches.
AVDD and IOVDD supply voltages should not be shared to prevent digital switching noise from coupling into the
analog signal chain.
ADC3683-SP
SBASAB5 – MARCH 2024
www.ti.com
48
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Product Folder Links: ADC3683-SP



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