IMX7DCEC datasheet(101/161 Pages) NXP

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Electrical characteristics

i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023

NXP Semiconductors

101

4.10.8.2 MIPI PHY signaling levels

The signal levels are different for differential HS mode and single-ended LP mode. Figure 64 shows both

the HS and LP signal levels on the left and right sides, respectively. The HS signaling levels are below

the LP low-level input threshold such that LP receiver always detects low on HS signals.

Figure 64. MIPI PHY Signaling Levels

4.10.8.3 MIPI HS line driver characteristics

Figure 65. Ideal Single-ended and Resulting Differential HS Signals

HS Vout

Range

HS Vcm

Range

Max VOD

Min VOD

VCMTX,MIN

VOLHS

VCMTX,MAX

VOHHS

LP VIL

VOL

VIH

VOH,MAX

VOH,MIN

VIH

VIL

LP Threshold

Region

VGNDSH,MA

VGNDSH,MIN

GND

LP VOL

HS Differential Signaling

LP Single-ended Signaling

VOD(1)

VOD(0)

VOD = VDP - VDN

VCMTX = (VDP + VDN)/2

(Differential)

VDN

VDP

Ideal Single-Ended High Speed Signals

Ideal Differential High Speed Signals

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