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CC1110-RTY1 bảng dữ liệu(PDF) 139 Page - Texas Instruments |
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CC1110-RTY1 bảng dữ liệu(HTML) 139 Page - Texas Instruments |
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139 / 203 page ![]() CC1110 CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A Page 139 of 202 Figure 28: SPI Dataflow 13.13.3 Baud Rate Generation An internal baud rate generator sets the UART baud rate when operating in UART mode and the SPI master clock frequency when operating in SPI mode. The UxBAUD.BAUD_M[7:0] and UxGCR.BAUD_E[4:0] registers define the baud rate used for UART transfers and the rate of the serial clock for SPI transfers. The baud rate is given by the following equation: F M BAUD Baudrate E BAUD ∗ ∗ + = 28 _ 2 2 ) _ 256 ( where F is the system clock frequency set by the selected system clock source. The register values required for standard baud rates are shown in Table 39 for a typical system clock set to 26 MHz. The table also gives the difference in actual baud rate to standard baud rate value as a percentage error. The maximum baud rate for UART mode is F/16 when BAUD_E is 16 and BAUD_M is 0, and where F is the system clock frequency. The maximum SPI clock frequency for SPI mode is F/2 when BAUD_E is 19 and BAUD_M is 0, and where F is the system clock frequency. Setting higher clock frequencies than this will give erroneous results. |
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