ATAM862 datasheet(79/110 Pages) ATMEL

79 / 110 page

4554E–4BMCU–05/06

ATAM862-3

23.8.9

Modulation and Demodulation

If the shift register is used together with Timer 2 or Timer 3 for modulation or demodulation pur-

poses, the 8-bit synchronous mode must be used. In this case, the unused Port 4 pins can be

used as conventional bi-directional ports.

The modulation and demodulation stages, if enabled, operate as soon as the SSI is activated

(SIR = 0) and cease when deactivated (SIR = 1).

Due to the byte-orientated data control, the SSI (when running normally) generates serial bit

streams which are submultiples of 8 bits. An SSI output masking (OMSK) function permits; how-

ever, the generation of bit streams of any length. The OMSK signal is derived indirectly from the

4-bit prescaler of the Timer 2 and masks out a programmable number of unrequired trailing data

bits during the shifting out of the final data word in the bit stream. The number of non-masked

data bits is defined by the value pre-programmed in the prescaler compare register. To use out-

put masking, the modulator stop mode bit (MSM) must be set to "0" before programming the

final data word into the SSI transmit buffer. This in turn, enables shift clocks to the prescaler

when this final word is shifted out. On reaching the compare value, the prescaler triggers the

OMSK signal and all following data bits are blanked.

Figure 23-23. SSI Output Masking Function

8-bit shift register

MSB

LSB

Shift_CL

Control

Timer 2

Output

SSI-control

Compare 2/1

4-bit counter 2/1

CL2/1

SCL

CM1

OMSK

TOG2

POUT

T1OUT

SYSCL

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