T89C51RC2-3CSIM datasheet(82/117 Pages) ATMEL

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T89C51RB2/RC2

4105D–8051–10/06

Ports 1, 2 and 3: 15 mA

Maximum total IOL for all output pins: 71 mA

If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than

the listed test conditions.

7. For other values, please contact your sales office.

DC Parameters for Low Voltage

TA = 0

°C to +70°C; V

SS = 0V; VCC = 2.7V to 3.3V; F = 0 to 20 MHz.

TA = -40

°C to +85°C; V

SS = 0V; VCC = 2.7V to 3.3V; F = 0 to 20 MHz.

Note:

1. Operating ICC is measured with all output pins disconnected; XTALA1 driven with TCLCH, TCHCL = 5 ns (see Figure 36.), VIL =

VSS + 0.5 V,

VIH = VCC - 0.5V; XTAL2 N. C. ; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used.

2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5 V, VIH = VCC -

0.5V; XTAL2 N. C; Port 0 = VCC; EA = RST = VSS (see Figure 33).

3. Power Down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC. ; RST = VSS

4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V

OLs of ALE and Ports 1

and 3.The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0

transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed

0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.

5. Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and

5V.

6. Under steady state (non-transient) conditions, I

OL must be externally limited as follows:

Maximum I

OL per port pin: 10 mA

Maximum IOL per 8-bit port:

Port 0: 26 mA

Ports 1, 2 and 3: 15 mA

Maximum total IOL for all output pins: 71 mA

If I

OL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater

than the listed test conditions.

Table 58. DC Parameters for Low Voltage

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Input Low Voltage

-0.5

0.2 V

CC - 0.1

Input High Voltage except RST, XTAL1

0.2 V

CC + 0.9

CC + 0.5

IH1

Input High Voltage, RST, XTAL1

0.7 V

CC + 0.5

Output Low Voltage, ports 1, 2, 3, 4 and 5 (6)

0.45

OL = 0.8 mA

(4)

OL1

Output Low Voltage, port 0, ALE, PSEN (6)

0.45

OL = 1.6 mA

(4)

Output High Voltage, ports 1, 2, 3, 4 and 5

0.9 V

OH = -10 μA

OH1

Output High Voltage, port 0, ALE, PSEN

0.9 V

OH = -40 μA

Logical 0 Input Current ports 1, 2, 3

-50

μA

Vin = 0.45 V

Input Leakage Current

±10

μA

0.45V < Vin < V

Logical 1 to 0 Transition Current, ports 1, 2, 3,

-650

μA

Vin = 2.0 V

RST

RST Pulldown Resistor

90 (5)

200

CIO

Capacitance of I/O Buffer

Fc = 1 MHz

TA = 25

°C

IPD

Power Down Current

10 (5)

μAV

CC = 2.5V to 3.5 V

(3)

ICC

Power Supply Current (7)

TBD

VCC = 3.3 V

(1)

VCC = 3.3 V

(2)

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