T89C51RC2-3CSIM datasheet(73/117 Pages) ATMEL

73 / 117 page

T89C51RB2/RC2

4105D–8051–10/06

Table 51. WDTPRG Register

WDTPRG - Watchdog Timer Out Register (0A7h)

Reset value XXXX X000

WDT During Power Down

and Idle

In Power Down mode the oscillator stops, which means the WDT also stops. While in

Power Down mode the user does not need to service the WDT. There are 2 methods of

exiting Power Down mode: by a hardware reset or via a level activated external inter-

rupt which is enabled prior to entering Power Down mode. When Power Down is exited

with hardware reset, servicing the WDT should occur as it normally should whenever the

T89C51RB2/RC2 is reset. Exiting Power Down with an interrupt is significantly different.

The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is

brought high, the interrupt is serviced. To prevent the WDT from resetting the device

while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high.

It is suggested that the WDT be reset during the interrupt service routine.

To ensure that the WDT does not overflow within a few states of exiting of powerdown, it

is better to reset the WDT just before entering powerdown.

In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting the

T89C51RB2/RC2 while in Idle mode, the user should always set up a timer that will peri-

odically exit Idle, service the WDT, and re-enter Idle mode.

Bit

Number

Bit

Mnemonic Description

Reserved

The value read from this bit is undetermined. Do not try to set this bit.

2S2

WDT Time-out select bit 2

1S1

WDT Time-out select bit 1

0S0

WDT Time-out select bit 0

Selected Time-out

(214 - 1) machine cycles, 16. 3 ms @ F

OSCA =12 MHz

(215 - 1) machine cycles, 32.7 ms @ FOSCA=12 MHz

16 - 1) machine cycles, 65. 5 ms @ F

OSCA=12 MHz

(217 - 1) machine cycles, 131 ms @ F

OSCA=12 MHz

(218 - 1) machine cycles, 262 ms @ FOSCA=12 MHz

19 - 1) machine cycles, 542 ms @ F

OSCA=12 MHz

(220 - 1) machine cycles, 1.05 s @ F

OSCA=12 MHz

(221 - 1) machine cycles, 2.09 s @ FOSCA=12 MHz

T89C51RC2-3CSIM bảng dữ liệu(PDF) 73 Page - ATMEL Corporation

T89C51RC2-3CSIM bảng dữ liệu(HTML) 73 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL