PI7C8150AND datasheet(34/111 Pages) PERICOM

34 / 111 page

PI7C8150A

2-PORT PCI-TO-PCI BRIDGE

Page 34 of 111

APRIL 2006 – Revision 1.1

The PI7C8150A forwards Type 1 to Type 1 configuration write transactions as delayed

transactions. Type 1 to Type 1 configuration write transactions are limited to a single data

transfer.

3.7.4

SPECIAL CYCLES

The Type 1 configuration mechanism is used to generate special cycle transactions in

hierarchical PCI systems. Special cycle transactions are ignored by acting as a target and

are not forwarded across the bridge. Special cycle transactions can be generated from Type

1 configuration write transactions in either the upstream or the down-stream direction.

PI7C8150A initiates a special cycle on the target bus when a Type 1 configuration write

transaction is being detected on the initiating bus and the following conditions are met

during the address phase:

The lowest two address bits on AD[1:0] are equal to 01b.

The device number in address bits AD[15:11] is equal to 11111b.

The function number in address bits AD[10:8] is equal to 111b.

The register number in address bits AD[7:2] is equal to 000000b.

The bus number is equal to the value in the secondary bus number register in

configuration space for downstream forwarding or equal to the value in the primary

bus number register in configuration space for upstream forwarding.

The bus command on CBE_L is a configuration write command.

When PI7C8150A initiates the transaction on the target interface, the bus command is

changed from configuration write to special cycle. The address and data are for-warded

unchanged. Devices that use special cycles ignore the address and decode only the bus

command. The data phase contains the special cycle message. The transaction is

forwarded as a delayed transaction, but in this case the target response is not forwarded

back (because special cycles result in a master abort). Once the transaction is completed on

the target bus, through detection of the master abort condition, PI7C8150A responds with

TRDY_L to the next attempt of the con-figuration transaction from the initiator. If more

than one data transfer is requested, PI7C8150A responds with a target disconnect operation

during the first data phase.

3.8

TRANSACTION TERMINATION

This section describes how PI7C8150A returns transaction termination conditions back to

the initiator.

The initiator can terminate transactions with one of the following types of termination:

Normal termination

06-0057

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