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TSI721 bảng dữ liệu(PDF) 12 Page - Renesas Technology Corp

tên linh kiện TSI721
Giải thích chi tiết về linh kiện  Table of Contents
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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TSI721 bảng dữ liệu(HTML) 12 Page - Renesas Technology Corp

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Tsi721 Datasheet
12
April 4, 2016
Integrated Device Technology
1.3
Block Diagram
The Tsi721 block diagram is displayed in the following figure. The five main functions of the device are briefly described below.
Figure 1: Block Diagram
1.3.1
PCIe Interface
The PCIe Interface performs all the physical, data link, and transport layer protocols associated with PCIe.
1.3.2
S-RIO Interface
The S-RIO Interface performs all the physical and transport layer protocols associated with S-RIO.
1.3.3
Messaging Engine
The Messaging Engine uses S-RIO messaging logical layer functions with dedicated messaging DMA channels per Tx queue
and per Rx queue.
1.3.4
Mapping Engine
The Mapping Engine maps between PCIe and S-RIO transactions, including segmentation and reassembly as required.
1.3.5
Block DMA Engine
The Block DMA Engine uses 8 DMA channels, where descriptors of each DMA channel can perform read or write.
JTAG
I2C
GPIO
Clock
Reset
Block DMA Engine (BDMA)
Messaging Engine (SMSG)
PCIe
Gen2
Interface
(x4, x2, x1)
S-RIO
Gen2
Interface
(x4, x2, x1)
Mapping Engine
PCIe to S-RIO (PC2SR)
S-RIO to PCIe (SR2PC)



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