PCF5271CVM100 datasheet(22/56 Pages) FREESCALE

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MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Design Recommendations

Freescale Semiconductor

The following tables provide a more comprehensive, step-by-step way to determine the correct address

line connections for interfacing the MCF5271 to SDRAM. To use the tables, find the one that corresponds

to the number of column address lines on the SDRAM and to the port size as seen by the MCF5271, which

is not necessarily the SDRAM port size. For example, if two 1M x 16-bit SDRAMs together form a

2M x 32-bit memory, the port size is 32 bits. Most SDRAMs likely have fewer address lines than are

shown in the tables, so follow only the connections shown until all SDRAM address lines are connected.

Table 6. MCF5271 to SDRAM Interface (8-Bit Port, 9-Column Address Lines)

MCF5271

Pins

A17 A16 A15 A14 A13 A12 A11 A10 A9 A18 A19 A20A21A22A23A24A25A26A27A28A29A30A31

Row

Column

2345

SDRAM

Pins

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22

Table 7. MCF5271MCF5271 to SDRAM Interface (8-Bit Port,10-Column Address Lines)

MCF5271

Pins

A17 A16 A15 A14 A13 A12 A11 A10 A9 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31

Row

1716151413121110

19202122

2627

28293031

Column

01234

5678

SDRAM

Pins

A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21

Table 8. MCF5271MCF5271 to SDRAM Interface (8-Bit Port,11-Column Address Lines)

MCF5271

Pins

A17 A16 A15 A14 A13 A12 A11 A10 A9 A19 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31

Row

1716151413121110

19212223

2728

293031

Column

01234

5678

SDRAM

Pins

A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20

Table 5. Generic Address Multiplexing Scheme (continued)

Address Pin Row Address Column Address

Notes Related to Port Sizes

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