ISL73141SEH

5. Applications Information

R34DS0012EU0402 Rev.4.2

Page 22 of 27

Feb 23, 2023

5.4

Convert Start (CS) Pin

The convert start input (CS) initiates a conversion in the ISL73141SEH. The input logic level of CS is determined

by the DVCC supply voltage, which operates across a range of 2.2V up to 3.6V. A falling edge on this input starts

a new conversion. The conversion is timed using an internal oscillator. The logic state of the CS pin controls the

state of the SDO pin. A logic high on the CS pin disables the SDO pin driver resulting in a high-impedance state

on the SDO pin. A logic low on the CS pin enables the SDO driver (unless PD is low) and allows data to be read

out following a conversion.

5.5

Power Down (PD) Pin

The ISL73141SEH has a power down pin that is active low (PD). When this pin is asserted the ISL73141SEH is

powered down to ≤50µW of total power dissipation. If PD is asserted during a conversion, the conversion is halted

and the SDO pin is held in high impedance (high-Z). The input logic level of PD is determined by the DVCC supply

voltage, which operates across a range of 2.2V up to 3.6V. There is an internal 500kΩ pull-up resistor connected

to DVCC on this pin.

5.6

Reference Input (REF) Pin

The ISL73141SEH has a voltage reference input that determines the full scale input range. The input voltage

range of this pin is from 1.95V to 3.6V (ISL73141SEHMFN) or 3.9V to 4.2V (ISL73141SEHMF7). Decouple this

pin to ground with a high quality, low ESR 10μF ceramic capacitor. Renesas recommends using a capacitor with a

voltage rating of 10V or greater and to place the capacitor as close as possible to the REF pin.

Use a low noise, low temperature drift reference to drive this pin. Input noise from the input reference directly

impacts the noise performance of the device. Temperature drift of the external reference affects the full scale error

for the over-temperature of the device.

5.7

ISL73141 Transfer Function

Figure 55 gives the transfer function of the device. Code transitions in the digital outputs bits of the device occur at

midway points between successive integer LSB values that range from 0.5 LSB, 1.5 LSB, 2.5 LSB, 3.5 LSB... and

FS - 3.5 LSB, FS - 2.5 LSB, FS - 1.5 LSB, FS - 0.5 LSB. The device is a 14-bit ADC with an output code range in

decimal from 0 to 2N-1 where N = 14, making the total code range 0 to 16383 inclusive.

5.8

Power Supply Sequencing

The ISL73141SEH does not have any specific power sequencing requirements when increasing the supply

voltages. IMPORTANT: You must follow the guidelines in the recommended operating conditions and take care in

observing the maximum supply voltage conditions outlined in the Absolute Maximum Ratings section.

Figure 55. ISL73141SEH Transfer Function

00 0000 0000 0000

00 0000 0000 0001

11 1111 1111 1110

11 1111 1111 1111

ADC Input Voltage