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ISL73141SEHF7/PROTO bảng dữ liệu(PDF) 10 Page - Renesas Technology Corp |
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ISL73141SEHF7/PROTO bảng dữ liệu(HTML) 10 Page - Renesas Technology Corp |
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10 / 28 page ![]() ISL73141SEH 3. Specifications R34DS0012EU0402 Rev.4.2 Page 10 of 27 Feb 23, 2023 3.4.3 ISL73141SEHMF7 - 5.0V Operation Burn-In Deltas 3.4.4 ISL73141SEHMFN - 3.3V Operation Burn-In Deltas 3.5 Timing Specifications 3.5.1 5V Operation AVCC = 5.0V; DVCC = 2.5V, REF = 4.096V, GND = 0V, fSAMP = 1000ksps, AIN = -1dBFS; TA = +25°C; unless otherwise noted. Parameter Symbol Test Conditions Min Max Unit Integral Non-Linearity INL Measured with full scale input signal -0.35 0.35 LSB Signal to Noise Ratio SNR FIN = 105kHz -1 1 dBFS Effective Number of Bits ENOB FIN = 105kHz -0.2 0.2 bits AVCC = 3.3V; DVCC = 2.5V, REF = 3.0V, GND = 0V, fSAMP = 750ksps, AIN = -1dBFS; TA = +25°C;unless otherwise noted. Parameter Symbol Test Conditions Min Max Unit Integral Non-Linearity INL Measured with full scale input signal -0.5 0.5 LSB Signal to Noise Ratio SNR FIN = 105kHz -1 1 dBFS Effective Number of Bits ENOB FIN = 105kHz -0.2 0.2 bits AVCC = 4.5V to 5.5V; DVCC = 2.2V to 3.6V, REF = 4.096V, GND = 0V, fSAMP = 1Msps, AIN = -1dBFS; TA = -55°C to +125°C, unless otherwise noted. Parameter Symbol Test Conditions Min (Notes 9, 10) Typ (Note 8) Max (Notes 9, 10)Unit Timing Characteristics Maximum Sampling Frequency fSAMP 1MHz Conversion Time tCONV BUSY Output High Time 595 665 ns CS High Time tCSH 40 ns SCK Held Low to CS↓ tQUIET 40 ns CS Falling Edge to BUSY↑ tBUSYLH CL = 10pF 17 25 ns SCK Period tSCK 20 ns SCK High Time tSCKH 8ns SCK Low Time tSCKL 8ns SDO Data Valid Delay from BUSY↓ tDBUSYLSDOV CL = 10pF -2.6 0 ns SDO Data Valid Delay from SCK↑ tDSCKSDOV CL = 10pF 18.5 ns SDO Data Valid Hold Time from SCK↑ tHSDOV CL = 10pF 8 13 ns SDO Bus Acquisition Time from CS↓ tDCSLSDOL CL = 10pF 11 20 ns SDO Bus Relinquish Time after CS↑ tDCSHSDOZ CL = 10pF 12 20 ns Wake-Up time from Power-Down Mode tWAKE Time to wait after PD↑ to first sample 20 µs |
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