ZAMC4100GA2R datasheet(144/156 Pages) RENESAS

144 / 156 page

ZAMC4100 Datasheet

144

January 26, 2016

5.2.7.

Reference Voltage Test

Event

There is failure in the ADC reference voltage.

Detection

The ADC input is connected to the internal reference voltage (this is not the ADC reference). The

value of this voltage is expected to be Vref/2 and the ADC should return the midscale value.

Details for software implementation:

ADC channel selected by the ADCCTRL register: IMPSEL[4:0] = 1CHEX

Expected ADC conversion result:

ADCRES[9:0] = 512 ± 30 (unsigned result)

Capturing

The event is captured in the MCU by reading the ADC conversion value.

Reaction

A response should be implemented in the MCU software depending on application requirements.

5.2.8.

5.0V Supply Test

Event

Regulator VDD5V0 voltage is out of range.

Detection

The regulator’s output is measured with the ADC. The expected result is the ADC midscale value.

Details for software implementation:

ADC channel selected by the ADCCTRL register: IMPSEL[4:0] = 1DHEX

Expected ADC conversion result:

ADCRES[9:0] = 512 ± 50 (unsigned result)

Capturing

The event is captured in the MCU by reading the ADC conversion value.

Reaction

A response should be implemented in the MCU software depending on application requirements.

5.2.9.

2.5V Supply Test

Event

Regulator VDD2V5 voltage is out of range.

Detection

The regulator’s output is measured with the ADC. The expected result is the ADC midscale value.

Details for software implementation:

ADC channel selected by the ADCCTRL register: IMPSEL[4:0] = 1EHEX

Expected ADC conversion result:

ADCRES[9:0] = 512 ± 50 (unsigned result)

Capturing

The event is captured in the MCU by reading the ADC conversion value.

Reaction

A response should be implemented in the MCU software depending on application requirements.

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