ZAMC4100GA2R datasheet(31/156 Pages) RENESAS

31 / 156 page

ZAMC4100 Datasheet

January 26, 2016

2.8.

SPI Bus

The Serial Peripheral Interface (SPI) bus is used as a primary communication bus between the MCU and SBC

peripherals, including the drivers. The SPI mastering is done by the MCU which configures and controls the SBC

peripherals (output drivers, ADC, LIN, etc.). The SBC SPI slave supports byte-wise frame transfer with 8 data bits

per frame. In order to secure the communication, the SBC SPI supports frame length validation.

2.9.

Diagnostic Functionalities

ZAMC4100 has a number of built-in protection and diagnostic features that enable the MCU to perform system

self-checks and to detect abnormal functionality. The main diagnostic functions supported by the ZAMC4100 are

as follows:

•

Open/short detection for each driver output

•

System supply monitoring and under/over-voltage detection

•

Open/short detection at ADC inputs

•

ADC internal circuitry check

•

LIN over-current and dominant time-out detection

•

SBC-to-MCU SPI connectivity check

2.10. Microcontroller ARM® Cortex™ M0

The microcontroller unit (MCU) of the ZAMC4100 features a 32-bit ARM® Cortex™-M0 processor core with

memory resources:

•

32 Kbytes program FLASH memory featuring

Minimum 10,000 erase/write cycles

10 years data retention at 85°C

•

2 Kbytes SRAM

The MCU peripherals include the following:

•

8 configurable GPIO

•

SW-LIN controller

•

32-bit timer module

•

Master SPI

•

Interrupt controller

ZAMC4100GA2R bảng dữ liệu(PDF) 31 Page - Renesas Technology Corp

ZAMC4100GA2R bảng dữ liệu(HTML) 31 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL