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ZAMC4100GA2R bảng dữ liệu(PDF) 93 Page - Renesas Technology Corp

tên linh kiện ZAMC4100GA2R
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ZAMC4100 Datasheet
© 2016 Integrated Device Technology, Inc.
93
January 26, 2016
Table 3.43 AINDIAG Register Bits Mapping
Name
AINDIAG
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
U
0
0
0
0
0
0
0
Access
U
R
R
R
R
R
R/W
R/W
Address
0x16
R/W = Read/Write bit; R = Read-only bit;
U = Unimplemented, read as ‘0’
Table 3.44 AINDIAG Register Bits Description
Bit Description
6
SPOSF: Open/short status flag of positive sensor supply pin (S_P).
This flag is not registered; i.e. its value stays as long as the diagnostic event takes place.
Refer to Table 3.45 for SPOSF bit description.
5:2
AINxOSF: Open/short status flag of the ADC external inputs AINx (x = 1 to 4).
This flag is not registered; i.e. its value stays as long as the diagnostic event takes place.
Refer to Table 3.45 for the interpretation of the AINxOSF bits.
1
AINCSHEN:
1), 2) High-side current source enable bit for inputs AINx (x = 1 to 4) and S_P.
1 = The high-side current source is enabled.
0 = The high-side current source is disabled.
0
AINCSLEN:
1), 2) Low-side current source enable bit for inputs AINx (x = 1 to 4) and S_P.
1 = The low-side current source is enabled.
0 = The low-side current source is disabled.
1)
In order to keep current consumption as low as possible, the MCU software should disable the current sources before enabling the SLEEP or
STANDBY Modes.
2)
Make sure this bit is ‘0’ when ADC conversion is enabled.



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