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HIP2210EVAL1Z bảng dữ liệu(PDF) 8 Page - Renesas Technology Corp |
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HIP2210EVAL1Z bảng dữ liệu(HTML) 8 Page - Renesas Technology Corp |
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8 / 28 page ![]() HIP2210, HIP2211 2. Specifications FN9347 Rev.1.01 Page 8 of 27 Jun.23.20 HI and LI Inputs (HIP2211) Low Level Threshold VIL 1.29 1.4 1.47 V High Level Threshold VIH 1.84 2.1 2.35 V Input Threshold Hysteresis VHYS -0.7 - V Input Pull-Down Resistance RIN HI = LI = VDD; Resistance to VSS - 95 - kΩ Minimum Input Pulse Width for Response at Output TMIN No load on HO and LO; Output drives to rail -10 - ns Tri-Level PWM Input (HIP2210) Middle to High Level Threshold VPWMHR VREF = 2.7V and 5.5V 63.6 66 69.7 % VREF High to Middle Level Threshold VPWMHF VREF = 2.7V and 5.5V 53.7 56 59.6 % VREF High/Middle Level Hysteresis VREF = 2.7V and 5.5V - 10 - % VREF Low to Middle Level Threshold VPWMLR VREF = 2.7V and 5.5V 30.3 33 36.3 % VREF Middle to Low Level Threshold VPWMLF VREF = 2.7V and 5.5V 19.5 23 26.3 % VREF Low/Middle Level Hysteresis VREF = 2.7V and 5.5V - 10 - % VREF PWM Open Circuit Voltage VFLOAT PWM pin floating; VREF = 2.7V and 5.5V 48 50 52 % VREF Logic High Input Current IPWMH PWM = 3V; VREF = 3V; Sourcing - 16 - µA Logic Low Input Current IPWML PWM = 0V; VREF = 3V; Sinking - 16 - µA PWM Pull-Up Resistance RUP To VREF -180 - kΩ PWM Pull-Down Resistance RDOWN To VSS - 180 - kΩ Minimum Input Pulse Width for Response at Output TMIN No load on HO and LO; Output drives to rail -20 - ns VREF Input (HIP2210) VREF Enabled Rising Threshold VVREF_R PWM = 0; EN = 1; RDT = 1kΩ -2.55 2.7 V VREF Disabled Hysteresis VVREF_H PWM = 0; EN = 1; RDT = 1kΩ -0.18- V VREF Enable Delay tVREF_R PWM = 0; EN = 1; RDT = 1kΩ -175 - ns VREF Disabled Delay tVREF_F PWM = 0; EN = 1; RDT = 1kΩ -110 - ns VREF Pull-Down Resistance to VSS RVREF VREF = 3V; PWM = Float - 90 - kΩ EN Input (HIP2210) Low-Level Threshold VENL 1.26 1.38 1.47 V High-Level Threshold VENH 1.84 2.1 2.31 V Input Threshold Hysteresis VHYS -0.72- V Input Pull-Down Resistance REN VEN = VDD; To VSS - 90 - kΩ EN High Propagation Delay tENH RDT = 1kΩ; PWM = 0 450 800 1100 ns EN Low Propagation Delay tENL RDT = 1kΩ; PWM = 0 - 115 150 ns Undervoltage Protection VDD Rising UVLO Threshold VDDR 5.3 5.6 5.9 V VDD Falling UVLO Threshold VDDF 4.75 5.1 5.35 V VDD Threshold Hysteresis VDDH - 0.5 - V VDD = HB = EN = 12V; VSS = HS = 0V; HI = LI = 0; VREF = 5V; PWM = 2.5V. No load on LO or HO, unless otherwise specified. Boldface limits apply across the operating temperature range, -40°C to +125°C. (Continued) Parameters Symbol Test Conditions Min (Note 11)Typ Max (Note 11)Units |
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