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ASI4U bảng dữ liệu(PDF) 24 Page - Renesas Technology Corp |
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ASI4U bảng dữ liệu(HTML) 24 Page - Renesas Technology Corp |
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24 / 71 page ![]() ASI4U / ASI4U-E / ASI4U-F Datasheet © 2016 Integrated Device Technology, Inc. 24 January 26, 2016 ASI4U Internal EEPROM Address [hex] Bit Position EEPROM Cell Content EEPROM Register Content 12 0 Enhanced_Status_Indication If set, Enhanced Status Indication Mode according to the AS-Interface Complete Specification is activated. Activates LED2 output! For compatibility to A²SI board layouts, this flag must not be set (= 0). 1 Dual_LED_Mode If set, LED1 and LED2 output signals are controlled to comply with the dual LED indication configurations of AS-i. Generated signals also depend on the value of the Enhanced_Status_Indication flag. Direct connection of a dual LED is supported. Activates LED2 output! For compatibility to A²SI board layouts, this flag must not be set (= 0). 2 FID_Invert The FID input value is inverted before further processing. 3 Safety_Mode If set, the ASI4U/ASI4U-E/ASI4U-F Safety Mode is enabled and a special data input routing is activated. 13 0 Synchronous_Data_IO Enables Synchronized Data I/O Mode 1 P2_Sync_Data_IO_Activation If flag is set, the logic value at the parameter pin P2 determines whether the Synchronous Data IO Mode is active or inactive. If flag is not set, the Synchronous Data IO Mode is always active if it was enabled by the Synchronous_Data_IO flag. 2 Ext_Addr_4I/4O_Mode Enables 4 Input / 4 Output support in Extended Address Mode. 3 ID_Code1_Protect If flag is set, ID_Code_Extension_1 is write- protected for user access. In Extended Address Mode, only bits 2 to 0 are blocked. Bit 3 is used for A/B slave selection and must remain user accessible. 14 0 to 3 ID1_Bit0 to ID1_Bit3 Protected_ID_Code_Extension_1 If the ID_Code1_Protect flag is set, a Read_ID_Code_1 request will be answered with the data stored in this register. 15 0 to 3 Trim Area; accessible by IDT only 16 0 to 3 17 0 to 3 |
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