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PI7C9X760ACLEX bảng dữ liệu(PDF) 34 Page - Diodes Incorporated |
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PI7C9X760ACLEX bảng dữ liệu(HTML) 34 Page - Diodes Incorporated |
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34 / 53 page ![]() 34 www.diodes.com April 2019 Diodes Incorporated PI7C9X760 Document Number DS40305 Rev 6-2 A product Line of Diodes Incorporated PI7C9X760 2 RW Transmitter Disable 0 = transmitter is enabled 1 = transmitter is disabled,UART does not send serial data out on the TX output pin after current data in the TSR is send. 1 RW Receiver Disable 0 = Receiver is enabled 1 = Receiver is disabled 0 RW 9-bit or Multidrop Mode Enable 0 = Normal 8-bit mode 1 = Enable 9-bit mode (addition bit defines data or address byte) Offset 0DH: Special Features Enable Control Register (SFREN). Accessible when LCR==8'hBF. Default=00 Bit Type Description [7:0] RW Set 8'h5A to enable SFR register access Offset 02H: Advance Status Register (ASR). Accessible when LCR=0xBF and SFR[2]=1. Default=00 Bit Type Description [7:6] RO Reserved [5:4] RO Xon/Xoff flow state 00 = idle state 01 = Xoff received 10 = TX off 11 = Xon received [3:2] RO Reserved 1 RO Remote TX disabled 1 = TX has sent XOFF message or RTS message 0 RO Transmitter terminate condition 1 = This TX has disabled by remote terminate. Offset 04H: Clock Prescale Register (CPR). Accessible when LCR=0xBF and SFR[2]=1. Default=10 Bit Type Description [7:4] RW CPRM - M number in calculating the prescaler,which is used to generate Baud Rate,it is recommend- ed to be set to "01h" or "02h" [3:0] RW CPRN - N number in calculating the prescaler,which is used to generate Baud Rate. Offset 05H: Received FIFO Data counter Register (RFD). Accessible when LCR=0xBF and SFR[2]=1, SFR[6]=0. Default=00 Bit Type Description [7:0] RO Indicated the amount of data in RX FIFO Offset 05H: Received Line Error Status counter Register (RLS). Accessible when LCR=0xBF and SFR[2]=1, SFR[6]=1. Default=00 Bit Type Description [7:0] RO Indicated the amount of data byte with error in RX FIFO Configuration Registers cont.. |
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