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PI7C9X760ACLEX bảng dữ liệu(PDF) 9 Page - Diodes Incorporated |
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PI7C9X760ACLEX bảng dữ liệu(HTML) 9 Page - Diodes Incorporated |
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9 / 53 page ![]() 9 www.diodes.com April 2019 Diodes Incorporated PI7C9X760 Document Number DS40305 Rev 6-2 A product Line of Diodes Incorporated PI7C9X760 3 Software flow control Software flow control is enabled through the Enhanced Features Register and the Modem Control Register. Different combinations of software flow control can be enabled by setting different combinations of EFR[3:0]. Table 1 shows software flow control options. Table 1. Software flow control options (EFR[3:0]) EFR[3] EFR[2] EFR[1] EFR[0] TX, RX software flow control 0 0 x x No transmit flow control 1 0 x x Transmit Xon1, Xoff1 0 1 x x Transmit Xon2, Xoff2 1 1 x x Transmit Xon1 and Xon2, Xoff1 and Xoff2 x x 0 0 No receive flow control x x 1 0 Receiver compares Xon1, Xoff1 x x 0 1 Receiver compares Xon2, Xoff2 1 0 1 1 Transmit Xon1, Xoff1 receiver compares Xon1 or Xon2, Xoff1 or Xoff2 0 1 1 1 Transmit Xon2, Xoff2 receiver compares Xon1 or Xon2, Xoff1 or Xoff2 1 1 1 1 Transmit Xon1 and Xon2, Xoff1 and Xoff2 receiver compares Xon1 and Xon2, Xoff1 and Xoff2 0 0 1 1 No transmit flow control receiver compares Xon1 and Xon2, Xoff1 and Xoff2 There are two other enhanced features relating to software flow control: • Xon Any function (MCR[5]): Receiving any character will resume operation after recognizing the Xoff character. It is possible that an Xon1 character is recognized as an Xon Any character, which could cause an Xon2 character to be written to the RX FIFO. • Special character (EFR[5]): Incoming data is compared to Xoff2. Detection of the special character sets the Xoff interrupt (IIR[4]) but does not halt transmission. The Xoff interrupt is cleared by a read of the Interrupt Identification Register (IIR). The special character is transferred to the RX FIFO. 3.1 Receive flow control When software flow control operation is enabled, UART will compare incoming data with Xoff1/Xoff2 programmed characters (in certain cases, Xoff1 and Xoff2 must be received sequentially). When the correct Xoff characters are received, transmission is halted af- ter completing transmission of the current character. Xoff detection also sets IIR[4] (if enabled via IER[5]) and causes IRQ to go LOW. To resume transmission, an Xon1/Xon2 character must be received (in certain cases Xon1 and Xon2 must be received sequentially). When the correct Xon characters are received, IIR[4] is cleared, and the Xoff interrupt disappears. I2C-bus Addressing |
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