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www.diodes.com

April 2019

Diodes Incorporated

PI7C9X760

Document Number DS40305 Rev 6-2

A product Line of

Diodes Incorporated

PI7C9X760

4. Hardware Reset, Power-On Reset (POR) and Software Reset

These three reset methods are identical and will reset the internal registers as indicated in Table 4.

Table 2 summarizes the state of register after reset.

Table 2. Register reset

Register

Reset state

Interrupt Enable Register

All bits cleared

Interrupt Identification Register

Bit 0 is set; all other bits cleared

FIFO Control Register

All bits cleared

Line Control Register

Reset to 0001 1101 (0x1D)

Modem Control Register

All bits cleared

Line Status Register

Bit 5 and bit 6 set; all other bits cleared

Modem Status Register

Bits 3:0 cleared; bits 7:4 input signals

Enhanced Features Register

All bits cleared

Receive Holding Register

Pointer logic cleared

Transmit Holding Register

Pointer logic cleared

Transmission Control Register

All bits cleared

Trigger Level Register

All bits cleared

Transmit FIFO level

Reset to 0100 0000 (0x40)

Receive FIFO level

All bits cleared

I/O direction

All bits cleared

I/O interrupt enable

All bits cleared

I/O control

All bits cleared

Extra Features Control Register

All bits cleared

Remark: Registers DLL, DLH, SPR, XON1, XON2, XOFF1, XOFF2 are not reset by the top-level reset signal RESET, Software Reset, that is, they hold their initial-

ization values during reset.

Table 3 summarizes the state of output signals after reset.

Table 3. Output signals after reset

Signal

Reset state

TX

HIGH

RTS

HIGH

I/Os

Inputs

IRQ

HIGH by external pull-up