PI7C9X760ACLEX datasheet(15/53 Pages) DIODES

tên linh kiện	PI7C9X760ACLEX

Giải thích chi tiết về linh kiện	I2C-bus/SPI to UART Bridge Controller w/ 64 bytes of TX/RX FIFOs

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15 / 53 page

www.diodes.com

April 2019

Diodes Incorporated

PI7C9X760

Document Number DS40305 Rev 6-2

A product Line of

Diodes Incorporated

PI7C9X760

DLL and DLH must be written to in order to program the baud rate. DLL and DLH are the least significant and most significant byte

of the baud rate divisor. If DLL and DLH are both zero, the UART is effectively disabled, as no baud clock will be generated.

Remark: The programmable baud rate generator is provided to select both the transmit and receive clock rates.

Table 5 to 8 show the baud rate and divisor correlation for crystal with frequency 1.8432 MHz, 3.072 MHz, 14.74926 MHz, and

24MHz respectively.

Figure 8 shows the crystal clock circuit reference.

PRESCALER

LOGIC

(DIVIDE-BV-1)

PRESCALER

LOGIC

(DIVIDE-BY-4)

input clock

INTERNAL

OSCILLATOR

LOGIC

BAUD RATE

GENERATOR

LOGIC

reference

clock

MCR[7] = 1

MCR[7] = 0

XTAL1

XTAL2

internal

baud rate

clock for

transmitter

and receiver

Figure 7. Prescaler and baud rate generator block diagram

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