L9960 datasheet(19/95 Pages) STMICROELECTRONICS

19 / 95 page

DS11115 Rev 10

19/95

L9960, L9960T

Functional description

Tri-state mode power consumption

Depending on the error detection affecting L9960, the bridge is switched to tri-state. In this

status the output leakage current is less than "Iout" (refer to Table 23) on the overall range

of functionality (Vps and temperature ranges).

Normal and VVL modes power consumption

In normal and VVL modes, the current consumption on Vps is mainly based on the output

current delivered to the load and the High-Side Power MOS supply consumption.

Battery voltage monitoring

The Vps voltage is monitored internally to detect undervoltage conditions on power supply

line.

When Vps decreases below the under-voltage threshold "Vps_uv" longer than a filter

"Tvps_uv", the bridge is disabled (SPI communication is still working).

The filtering time "Tvps_uv" is implemented to avoid unwanted detection due to parasitic

glitches when Vps increases as well as decreases.

As soon as the voltage rises again above the Vps under-voltage threshold (hysteresis

implemented), the bridge is switched back to normal mode driven by DIR and PWM levels

(or IN1/IN2). All the settings are kept as before the under-voltage event. No PWM toggle is

necessary to restart the H-bridge if the condition is disappeared.

The Vps voltage monitoring information is readable via SPI by VPS_UV bit which is not

latched.

The info is available in position R0 of the answer frame 8a.

The information is also readable by VPS_UV_REG bit which is latched.

The info is available in position R5 of the answer frame 8a.

Table 9. VPS_UV

Bit status

Description

Condition

Vps > Vps_uv longer than Tvps_uv

Default value

Vps < Vps_uv longer than Tvps_uv

Table 10. VPS_UV_REG

Bit status

Description

Condition

latched Vps > Vps_uv longer than Tvps_uv

Default value

latched Vps < Vps_uv longer than Tvps_uv

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