L9960 datasheet(61/95 Pages) STMICROELECTRONICS

61 / 95 page

DS11115 Rev 10

61/95

L9960, L9960T

Functional description

4.8.2

Diagnostic reset bit

In case of "DIAG_CLR_EN" set to HIGH (RESET value), all the bits of the diagnostic

In case of "DIAG_CLR_EN" set to LOW, the SPI diagnostics reading doesn't clear the flag

for diagnostics flags bits reported in Table 72. Therefore, the bridge is kept in disable state

until a transition from "high" to "low" on DIS pin or RESET condition.

Note:

(-) available in the R0 bit position in SPI command frame 3.

A register reports the echo of DIAG_CLR_EN configuration regsiter: "DIAG_CLR_EN_echo"

Note:

(-) available in the 1st bit position in SPI answer frame 7a.

If a new diagnostic occurs simultaneously with diagnostic register reset, this new diagnostic

becomes the new status of the diagnostic register (new information must not be lost).

Known limitation:

This diagnostic reset strategy has a limitation: if the SPI transfer is not correct (for example

only 15 clock periods instead of 16) and the diagnostic register has already been cleared, if

the failure is no more present, the information is lost (it has not been transferred to the

µcontroller).

Table 72. DIAG_CLR_EN

Bit config

Description

Comment

OC and OT diagnostic status bits not cleared by SPI reading

Clear of diagnostic status bits by SPI reading

Reset value

Table 73. DIAG_CLR_EN_echo

Bit config

Description

Comment

OC and OT diagnostic status bits not cleared by SPI

Clear of diagnostic status bits by SPI reading

Default value

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