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L9374LF bảng dữ liệu(PDF) 39 Page - STMicroelectronics |
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L9374LF bảng dữ liệu(HTML) 39 Page - STMicroelectronics |
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39 / 80 page ![]() DocID025414 Rev 1 39/80 L9374LF Circuit description 79 4.6.1 Current not reachable detection(Q3 and Q4 only): The current not reachable bit is set (CNRx = 1, see section 5.2.4) when the current controller control variable is set to 1FF(Hex) for more than tCURR_F (8ms typ, Table 18). This indicates that the current requested has not been attained for that duration. The CNRx bit is also set when the current measurement sign bit is set to 1 for more than tCURR_F (8ms typ, Table 18). In both cases a failure is indicated via SPI (and the ISAT parameter is reset). 4.7 Output driver The output driver controls the gate of the low side power DMOS as well as provides specific diagnostic information to the SPI diagnostic registers. There are several signals that control the actuation of the output power DMOS. In normal operation the typical input is the f_Qx from the PWM generator. Other inputs that can turn on the output are the silent valve driver test (SVDT) and the Fast Switch on circuitry. Inputs that can disable the outputs are the fast switch off command, device enable, and certain failure detections that can potentially cause catastrophic damage if the output is left on. Figure 24. Gate drive block diagram with power 4.7.1 Input controls The output driver control circuit includes the logical combination of the following signals: PWM Generator output signal: (f_Qx) Silent Valve Driver Test signal (SVDT) Device Enable (EN) Specific Diagnostic failure indications such as PGND loss, overload, over temperature (Diag_F). Fast Switch off for all outputs: (FSOFF_ALL) Fast Switch on Enable: (FSON_EN) Direct SPI driven output switching through the Fast Switch On command (ONX) In normal operation, the signals EN = ‘1’, FSOFF_ALL = ‘0’, Diag_F = ‘0’, allow the gate to be driven by the PWM Generator signal (f_Qx). PWM Generator signal can override the SVDT input if actuation is commanded during an SVDT. The signals Diag_F=’0’, EN=’0’ and FSOFF_ALL=’1’ by-pass all other inputs and turn off the output immediately. The Diag_F flag is set to ‘1’ at the detection of PGND loss, overload and |
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