L9374LF datasheet(52/80 Pages) STMICROELECTRONICS

52 / 80 page

Circuit description

L9374LF

52/80

DocID025414 Rev 1

Figure 32. SVDT-Timing with SPI-transfer:

SVDT test sequence

Disable Edge Shaping (Command address 2, bits D8 & D7 = ‘10’)

Initiate SVDT (Command address 2; bits D1 & D0 = ‘10’)

Qx switches on at the next sync-signal (sequence of actuation: Q1..Q4)

Because the output is actuated the output current increases.

At time tx, if the output current has exceeded the under current value, IUC, the output is

switched off.

If the over current threshold (IOC) is achieved prior to tx then the output is immediately

disabled and an over current condition is detected.

The output will switch off any time prior to exceeding time, ty, if the undercurrent

threshold, IUC, has been met.

After the output is disabled if the output clamps the voltage to VZ (35V) a Dx_Loss is

detected.

If an Over temperature is not detected then the SDVT test is passed

10. The SVDT will then test at Qx+1 until all 4 outputs have been tested.

Criterion for passing:



no overcurrent



Current value increases and reached undercurrent value within time ty (IQx>IUC) &

(tx<t<ty).



Channels with a freewheeling diode does not have a clamping thus do not report a

Dx_Loss condition

SPI:



no failure at all Output status registers (Status Addresses 1 - 4).



Qx_ON = 1

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