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R7FA6T2AB3CFM bảng dữ liệu(PDF) 36 Page - Renesas Technology Corp

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Note:
200 ns minimum in Software Standby mode.
Note:
If the clock source is switched, add 4 clock cycles of the switched source.
Note 1. tPcyc indicates the PCLKB cycle.
Note 2. tNMICK indicates the cycle of the NMI digital filter sampling clock.
Note 3. tIRQCK indicates the cycle of the IRQi digital filter sampling clock.
tNMIW
NMI
Figure 2.12
NMI interrupt input timing
tIRQW
IRQ
Figure 2.13
IRQ interrupt input timing
2.3.6
I/O Ports, POEG, GPT, AGT, KINT and ADC Trigger Timing
Table 2.20
I/O ports, POEG, GPT, AGT, KINT and ADC trigger timing (1 of 4)
GPT Conditions:
High drive output is selected in the Port Drive Capability bit in the PmnPFS register.
AGT Conditions:
Middle drive output is selected in the Port Drive Capability bit in the PmnPFS register.
Parameter
Symbol
Min
Typ
Max
Unit
Test conditions
I/O ports
Input data pulse width
tPRW
1.5
—
—
tIcyc
Figure 2.14
RA6T2 Datasheet
2. Electrical Characteristics
R01DS0400EJ0120 Rev.1.20
Mar 31, 2022
Page 36 of 93



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