VSC8658 datasheet(46/95 Pages) MICROSEMI

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Configuration

VMDS-10242 VSC8658 Datasheet Revision 4.1

Note After configuring bits 13:8 of the extended PHY control register set 1, a software reset (register 0,

bit 15) must be written to change the device operating mode.

5.2.19

Extended PHY Control Set 2

The second set of extended controls is located in register 24 in the main register space for the device.

The following table shows the settings and readouts available.

10:8

Media operating

mode

R/W

This is a super-sticky bit.

000 = Cat5 copper only.

001 = SerDes fiber/SFP pass-through mode

only. No auto-negotiation performed in the

PHY.

010 = 1000BASE-X fiber/SFP media only with

auto-negotiation performed by the PHY.

011 = 100BASE-X fiber/SFP on the fiber

media pins only

101 = Auto-Media Sense with Cat5 media or

SerDes fiber/SFP pass-through mode.

110 = Auto-Media Sense with Cat5 media or

1000BASE-X fiber/SFP media with auto-

negotiation performed by PHY.

111 = Auto-Media Sense with Cat5 media or

100BASE-FX fiber/SFP media.

100 = Reserved.

CMODE

7:6

Force AMS override

R/W

00 = Normal auto-media selection (AMS).

01 = Force AMS to select SerDes media only.

10 = Force AMS to select copper media only.

11 = Reserved.

5:4

Reserved

Far-end loopback

mode

R/W

1 = Enabled.

Reserved

SGMII alignment

error status

This is a self-clearing bit.

1 = Alignment error detected since last read.

EEPROM status

1 = EEPROM present on EECLK and EEDAT

pins.

Table 28 •

Extended PHY Control 2, Address 24 (0x18)

Bit

Name

Access

Description

Default

15:13

100BASE-TX edge

rate control

R/W

This is a sticky bit.

011 = +5 Edge rate (slowest).

010 = +4 Edge rate.

001 = +3 Edge rate.

000 = +2 Edge rate.

111 = +1 Edge rate.

110 = Default edge rate.

101 = –1 Edge rate.

100 = –2 Edge rate (fastest).

110

PICMG 2.16 reduced

power mode

R/W

This is a sticky bit.

1 = Enabled.

Table 27 •

Extended PHY Control 1, Address 23 (0x17) (continued)

Bit

Name

Access Description

Default

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