IMX7ULPIECB2 datasheet(79/112 Pages) NXP

tên linh kiện	IMX7ULPIECB2

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Table 43. USB signal definitions—Parallel (ULPI) interface

(continued)

Name

Direction

Signal description

USB_DIR

Direction. Controls the direction of the Data bus.

USB_STP

Out

Stop. The link asserts this signal for 1 clock cycle to stop the

data stream currently on the bus.

USB_NXT

Next. The PHY asserts this signal to throttle the data.

The following figure shows the USB transmit/receive timing diagram in parallel

mode.

Figure 26. USB Transmit and Receive timing diagram—Parallel (ULPI) mode

The following table lists the USB Transmit and Receive timing parameters in Parallel

(ULPI) mode.

Table 44. USB Transmit and Receive Timing Parameters—Parallel (ULPI) Mode

Parameter

Min

Max

Unit

Conditions/

reference signal

US15

Setup time (DIR and NXT in, DAT in)

6.0

—

14 pF

US16

Hold time (DIR and NXT in, DAT in)

—

14 pF

US17

Output delay time (STP out, DAT out)

9.0

14 pF

9 Specifications—real-time domain

Specifications—real-time domain

i.MX 7ULP Applications Processor—Industrial, Rev. 1, 07/2021

NXP Semiconductors

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